#include <stdlib.h>
#include <stdio.h>
#include <string.h>
-#include <assert.h>
#include <fcntl.h>
#include <inttypes.h>
#include <errno.h>
#include <sys/stat.h>
#include <sys/time.h>
#include "drm.h"
-#include "i915_drm.h"
+#include "ioctl_wrappers.h"
#include "drmtest.h"
#include "intel_bufmgr.h"
#include "intel_batchbuffer.h"
-#include "intel_gpu_tools.h"
+#include "intel_io.h"
+#include "intel_chipset.h"
static drm_intel_bufmgr *bufmgr;
struct intel_batchbuffer *batch;
static drm_intel_bo *target_buffer;
+static int has_ppgtt = 0;
/*
* Testcase: Basic bsd MI check using MI_STORE_DATA_IMM
*/
static void
-store_dword_loop(void)
+emit_store_dword_imm(int devid, drm_intel_bo *dest, uint32_t val)
{
- int cmd, i, val = 0;
- uint32_t *buf;
-
- cmd = MI_STORE_DWORD_IMM | MI_MEM_VIRTUAL;
+ int cmd;
+ cmd = MI_STORE_DWORD_IMM;
+ if (!has_ppgtt)
+ cmd |= MI_MEM_VIRTUAL;
- for (i = 0; i < 0x100000; i++) {
+ if (intel_gen(devid) >= 8) {
+ BEGIN_BATCH(4);
+ OUT_BATCH(cmd);
+ OUT_RELOC(dest, I915_GEM_DOMAIN_INSTRUCTION,
+ I915_GEM_DOMAIN_INSTRUCTION, 0);
+ OUT_BATCH(0);
+ OUT_BATCH(val);
+ ADVANCE_BATCH();
+ } else {
BEGIN_BATCH(4);
OUT_BATCH(cmd);
OUT_BATCH(0); /* reserved */
- OUT_RELOC(target_buffer, I915_GEM_DOMAIN_RENDER,
- I915_GEM_DOMAIN_RENDER, 0);
+ OUT_RELOC(dest, I915_GEM_DOMAIN_INSTRUCTION,
+ I915_GEM_DOMAIN_INSTRUCTION, 0);
OUT_BATCH(val);
ADVANCE_BATCH();
+ }
+}
+
+static void
+store_dword_loop(int devid, int divider)
+{
+ int i, val = 0;
+ uint32_t *buf;
+ igt_info("running storedw loop on render with stall every %i batch\n", divider);
+
+ for (i = 0; i < SLOW_QUICK(0x2000, 0x10); i++) {
+ emit_store_dword_imm(devid, target_buffer, val);
intel_batchbuffer_flush_on_ring(batch, I915_EXEC_BSD);
+ if (i % divider != 0)
+ goto cont;
+
drm_intel_bo_map(target_buffer, 0);
buf = target_buffer->virtual;
- if (buf[0] != val) {
- fprintf(stderr,
- "value mismatch: cur 0x%08x, stored 0x%08x\n",
- buf[0], val);
- exit(-1);
- }
+ igt_assert_f(buf[0] == val,
+ "value mismatch: cur 0x%08x, stored 0x%08x\n",
+ buf[0], val);
drm_intel_bo_unmap(target_buffer);
+cont:
val++;
}
drm_intel_bo_map(target_buffer, 0);
buf = target_buffer->virtual;
- printf("completed %d writes successfully, current value: 0x%08x\n", i,
+ igt_info("completed %d writes successfully, current value: 0x%08x\n", i,
buf[0]);
drm_intel_bo_unmap(target_buffer);
}
-int main(int argc, char **argv)
+igt_simple_main
{
int fd;
int devid;
- if (argc != 1) {
- fprintf(stderr, "usage: %s\n", argv[0]);
- exit(-1);
- }
-
fd = drm_open_any();
devid = intel_get_drm_devid(fd);
- if (IS_GEN2(devid) || IS_GEN3(devid) || IS_GEN4(devid) || IS_GEN5(devid)) {
+ has_ppgtt = gem_uses_aliasing_ppgtt(fd);
- fprintf(stderr, "MI_STORE_DATA can only use GTT address on gen4+/g33 and "
- "needs snoopable mem on pre-gen6\n");
- return 77;
- }
+ igt_skip_on_f(intel_gen(devid) < 6,
+ "MI_STORE_DATA can only use GTT address on gen4+/g33 and "
+ "needs snoopable mem on pre-gen6\n");
+
+ igt_skip_on_f(intel_gen(devid) == 6,
+ "MI_STORE_DATA broken on gen6 bsd\n");
- /* This supposedly only works with ppgtt */
- return 77;
+ /* This only works with ppgtt */
+ igt_require(has_ppgtt);
bufmgr = drm_intel_bufmgr_gem_init(fd, 4096);
- if (!bufmgr) {
- fprintf(stderr, "failed to init libdrm\n");
- exit(-1);
- }
+ igt_assert(bufmgr);
drm_intel_bufmgr_gem_enable_reuse(bufmgr);
batch = intel_batchbuffer_alloc(bufmgr, devid);
- if (!batch) {
- fprintf(stderr, "failed to create batch buffer\n");
- exit(-1);
- }
+ igt_assert(batch);
target_buffer = drm_intel_bo_alloc(bufmgr, "target bo", 4096, 4096);
- if (!target_buffer) {
- fprintf(stderr, "failed to alloc target buffer\n");
- exit(-1);
- }
+ igt_assert(target_buffer);
- store_dword_loop();
+ store_dword_loop(devid, 1);
+ store_dword_loop(devid, 2);
+ if (!igt_run_in_simulation()) {
+ store_dword_loop(devid, 3);
+ store_dword_loop(devid, 5);
+ }
drm_intel_bo_unreference(target_buffer);
intel_batchbuffer_free(batch);
drm_intel_bufmgr_destroy(bufmgr);
close(fd);
-
- return 0;
}