* The goal is to simply ensure the basics work.
*/
-#include "rendercopy.h"
+#ifdef HAVE_CONFIG_H
+#include "config.h"
+#endif
+
+#include <stdlib.h>
+#include <sys/ioctl.h>
+#include <stdio.h>
+#include <string.h>
+#include <fcntl.h>
+#include <inttypes.h>
+#include <errno.h>
+#include <sys/stat.h>
+#include <sys/time.h>
+
+#include <drm.h>
+
+#include "ioctl_wrappers.h"
+#include "drmtest.h"
+#include "intel_bufmgr.h"
+#include "intel_batchbuffer.h"
+#include "intel_io.h"
+#include "intel_chipset.h"
+#include "igt_aux.h"
#define WIDTH 512
#define STRIDE (WIDTH*4)
#define SIZE (HEIGHT*STRIDE)
static uint32_t linear[WIDTH*HEIGHT];
-static render_copyfunc_t render_copy;
+static igt_render_copyfunc_t render_copy;
static void
check_bo(int fd, uint32_t handle, uint32_t val)
gem_read(fd, handle, 0, linear, sizeof(linear));
for (i = 0; i < WIDTH*HEIGHT; i++) {
- if (linear[i] != val) {
- fprintf(stderr, "Expected 0x%08x, found 0x%08x "
- "at offset 0x%08x\n",
- val, linear[i], i * 4);
- abort();
- }
+ igt_assert_f(linear[i] == val,
+ "Expected 0x%08x, found 0x%08x "
+ "at offset 0x%08x\n",
+ val, linear[i], i * 4);
val++;
}
}
uint32_t start = 0;
int i, j, fd, count;
+ igt_simple_init(argc, argv);
+
fd = drm_open_any();
- render_copy = get_render_copyfunc(intel_get_drm_devid(fd));
- if (render_copy == NULL) {
- printf("no render-copy function, doing nothing\n");
- return 77;
- }
+ render_copy = igt_get_render_copyfunc(intel_get_drm_devid(fd));
+ igt_require(render_copy);
bufmgr = drm_intel_bufmgr_gem_init(fd, 4096);
batch = intel_batchbuffer_alloc(bufmgr, intel_get_drm_devid(fd));
if (count == 0)
count = 3 * gem_aperture_size(fd) / SIZE / 2;
else if (count < 2) {
- fprintf(stderr, "count must be >= 2\n");
+ igt_warn("count must be >= 2\n");
return 1;
}
- printf("Using %d 1MiB buffers\n", count);
+ if (count > intel_get_total_ram_mb() * 9 / 10) {
+ count = intel_get_total_ram_mb() * 9 / 10;
+ igt_info("not enough RAM to run test, reducing buffer count\n");
+ }
bo = malloc(sizeof(*bo)*count);
start_val = malloc(sizeof(*start_val)*count);
gem_write(fd, bo[i]->handle, 0, linear, sizeof(linear));
}
- printf("Verifying initialisation...\n");
+ igt_info("Verifying initialisation...\n");
for (i = 0; i < count; i++)
check_bo(fd, bo[i]->handle, start_val[i]);
- printf("Cyclic blits, forward...\n");
+ igt_info("Cyclic blits, forward...\n");
for (i = 0; i < count * 4; i++) {
- struct scratch_buf src, dst;
+ struct igt_buf src, dst;
src.bo = bo[i % count];
src.stride = STRIDE;
dst.tiling = I915_TILING_NONE;
dst.size = SIZE;
- render_copy(batch, &src, 0, 0, WIDTH, HEIGHT, &dst, 0, 0);
+ render_copy(batch, NULL, &src, 0, 0, WIDTH, HEIGHT, &dst, 0, 0);
start_val[(i + 1) % count] = start_val[i % count];
}
for (i = 0; i < count; i++)
if (igt_run_in_simulation())
return 0;
- printf("Cyclic blits, backward...\n");
+ igt_info("Cyclic blits, backward...\n");
for (i = 0; i < count * 4; i++) {
- struct scratch_buf src, dst;
+ struct igt_buf src, dst;
src.bo = bo[(i + 1) % count];
src.stride = STRIDE;
dst.tiling = I915_TILING_NONE;
dst.size = SIZE;
- render_copy(batch, &src, 0, 0, WIDTH, HEIGHT, &dst, 0, 0);
+ render_copy(batch, NULL, &src, 0, 0, WIDTH, HEIGHT, &dst, 0, 0);
start_val[i % count] = start_val[(i + 1) % count];
}
for (i = 0; i < count; i++)
check_bo(fd, bo[i]->handle, start_val[i]);
- printf("Random blits...\n");
+ igt_info("Random blits...\n");
for (i = 0; i < count * 4; i++) {
- struct scratch_buf src, dst;
+ struct igt_buf src, dst;
int s = random() % count;
int d = random() % count;
dst.tiling = I915_TILING_NONE;
dst.size = SIZE;
- render_copy(batch, &src, 0, 0, WIDTH, HEIGHT, &dst, 0, 0);
+ render_copy(batch, NULL, &src, 0, 0, WIDTH, HEIGHT, &dst, 0, 0);
start_val[d] = start_val[s];
}
for (i = 0; i < count; i++)