#include <errno.h>
#include <sys/stat.h>
#include <sys/time.h>
-#include "drm.h"
-#include "i915_drm.h"
+
+#include <drm.h>
+
+#include "ioctl_wrappers.h"
#include "drmtest.h"
#include "intel_bufmgr.h"
#include "intel_batchbuffer.h"
-#include "intel_gpu_tools.h"
+#include "intel_io.h"
+#include "intel_chipset.h"
+#include "igt_aux.h"
/*
* Testcase: snoop consistency when touching partial cachelines
static void
copy_bo(drm_intel_bo *src, drm_intel_bo *dst)
{
- BEGIN_BATCH(8);
- OUT_BATCH(XY_SRC_COPY_BLT_CMD |
- XY_SRC_COPY_BLT_WRITE_ALPHA |
- XY_SRC_COPY_BLT_WRITE_RGB);
+ BLIT_COPY_BATCH_START(devid, 0);
OUT_BATCH((3 << 24) | /* 32 bits */
(0xcc << 16) | /* copy ROP */
4096);
flags &= ~TEST_READ;
if (IS_BROADWATER(devid) || IS_CRESTLINE(devid)) {
/* chipset is completely fubar */
- printf("coherency broken on i965g/gm\n");
+ igt_info("coherency broken on i965g/gm\n");
flags = 0;
}
igt_subtest("reads") {
igt_require(flags & TEST_READ);
- printf("checking partial reads\n");
+ igt_info("checking partial reads\n");
for (i = 0; i < ROUNDS; i++) {
uint8_t val0 = i;
igt_subtest("writes") {
igt_require(flags & TEST_WRITE);
- printf("checking partial writes\n");
+ igt_info("checking partial writes\n");
for (i = 0; i < ROUNDS; i++) {
uint8_t val0 = i, val1;
igt_subtest("read-writes") {
igt_require((flags & TEST_BOTH) == TEST_BOTH);
- printf("checking partial writes after partial reads\n");
+ igt_info("checking partial writes after partial reads\n");
for (i = 0; i < ROUNDS; i++) {
uint8_t val0 = i, val1, val2;