powerpc: Use faster means to access FPSCR when possible in some cases

[external/glibc.git] / sysdeps / powerpc / fpu / fenv_libc.h

diff --git a/sysdeps/powerpc/fpu/fenv_libc.h b/sysdeps/powerpc/fpu/fenv_libc.h
index f66bf24..55b1697 100644 (file)
--- a/sysdeps/powerpc/fpu/fenv_libc.h
+++ b/sysdeps/powerpc/fpu/fenv_libc.h
@@ -34,6 +34,27 @@ extern const fenv_t *__fe_mask_env (void) attribute_hidden;
    pointer.  */
 #define fegetenv_register() __builtin_mffs()
 
+/* Equivalent to fegetenv_register, but only returns bits for
+   status, exception enables, and mode.  */
+
+#define fegetenv_status_ISA300()                                       \
+  ({register double __fr;                                              \
+    __asm__ __volatile__ (                                             \
+      ".machine push; .machine \"power9\"; mffsl %0; .machine pop"     \
+      : "=f" (__fr));                                                  \
+    __fr;                                                              \
+  })
+
+#ifdef _ARCH_PWR9
+# define fegetenv_status() fegetenv_status_ISA300()
+#else
+# define fegetenv_status()                                             \
+  (__glibc_likely (__builtin_cpu_supports ("arch_3_00"))               \
+   ? fegetenv_status_ISA300()                                          \
+   : fegetenv_register()                                               \
+  )
+#endif
+
 /* Equivalent to fesetenv, but takes a fenv_t instead of a pointer.  */
 #define fesetenv_register(env) \
        do { \