Deal with cross-bitness compilation warnings Pt.2 (#19781)

[platform/upstream/coreclr.git] / src / vm / arm / cgencpu.h

diff --git a/src/vm/arm/cgencpu.h b/src/vm/arm/cgencpu.h
index 745626b..6289117 100644 (file)
--- a/src/vm/arm/cgencpu.h
+++ b/src/vm/arm/cgencpu.h
@@ -102,7 +102,11 @@ EXTERN_C void setFPReturn(int fpSize, INT64 retVal);
 // as large as the largest FieldMarshaler subclass. This requirement
 // is guarded by an assert.
 //=======================================================================
+#ifdef _WIN64
+#define MAXFIELDMARSHALERSIZE               40
+#else
 #define MAXFIELDMARSHALERSIZE               24
+#endif
 
 //**********************************************************************
 // Parameter size
@@ -985,6 +989,11 @@ inline BOOL IsUnmanagedValueTypeReturnedByRef(UINT sizeofvaluetype)
     return (sizeofvaluetype > 4);
 }
 
+#ifdef _MSC_VER
+#pragma warning(push)
+#pragma warning(disable:4359) // Prevent "warning C4359: 'UMEntryThunkCode': Alignment specifier is less than actual alignment (8), and will be ignored." in crossbitness scenario
+#endif // _MSC_VER
+
 struct DECLSPEC_ALIGN(4) UMEntryThunkCode
 {
     WORD        m_code[4];
@@ -1010,6 +1019,10 @@ struct DECLSPEC_ALIGN(4) UMEntryThunkCode
     }
 };
 
+#ifdef _MSC_VER
+#pragma warning(pop)
+#endif // _MSC_VER
+
 struct HijackArgs
 {
     union
@@ -1082,7 +1095,7 @@ inline BOOL ClrFlushInstructionCache(LPCVOID pCodeAddr, size_t sizeOfCode)
 
 EXTERN_C VOID STDCALL PrecodeFixupThunk();
 
-#define PRECODE_ALIGNMENT           CODE_SIZE_ALIGN
+#define PRECODE_ALIGNMENT           sizeof(void*)
 #define SIZEOF_PRECODE_BASE         CODE_SIZE_ALIGN
 #define OFFSETOF_PRECODE_TYPE       0