// Copyright 2011 the V8 project authors. All rights reserved.
-// Redistribution and use in source and binary forms, with or without
-// modification, are permitted provided that the following conditions are
-// met:
-//
-// * Redistributions of source code must retain the above copyright
-// notice, this list of conditions and the following disclaimer.
-// * Redistributions in binary form must reproduce the above
-// copyright notice, this list of conditions and the following
-// disclaimer in the documentation and/or other materials provided
-// with the distribution.
-// * Neither the name of Google Inc. nor the names of its
-// contributors may be used to endorse or promote products derived
-// from this software without specific prior written permission.
-//
-// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-
-#include "v8.h"
+// Use of this source code is governed by a BSD-style license that can be
+// found in the LICENSE file.
+
+#include "src/v8.h"
#if V8_TARGET_ARCH_X64
-#include "x64/lithium-gap-resolver-x64.h"
-#include "x64/lithium-codegen-x64.h"
+#include "src/x64/lithium-codegen-x64.h"
+#include "src/x64/lithium-gap-resolver-x64.h"
namespace v8 {
namespace internal {
void LGapResolver::Resolve(LParallelMove* parallel_move) {
- ASSERT(moves_.is_empty());
+ DCHECK(moves_.is_empty());
// Build up a worklist of moves.
BuildInitialMoveList(parallel_move);
// Perform the moves with constant sources.
for (int i = 0; i < moves_.length(); ++i) {
if (!moves_[i].IsEliminated()) {
- ASSERT(moves_[i].source()->IsConstantOperand());
+ DCHECK(moves_[i].source()->IsConstantOperand());
EmitMove(i);
}
}
// which means that a call to PerformMove could change any source operand
// in the move graph.
- ASSERT(!moves_[index].IsPending());
- ASSERT(!moves_[index].IsRedundant());
+ DCHECK(!moves_[index].IsPending());
+ DCHECK(!moves_[index].IsRedundant());
// Clear this move's destination to indicate a pending move. The actual
// destination is saved in a stack-allocated local. Recursion may allow
// multiple moves to be pending.
- ASSERT(moves_[index].source() != NULL); // Or else it will look eliminated.
+ DCHECK(moves_[index].source() != NULL); // Or else it will look eliminated.
LOperand* destination = moves_[index].destination();
moves_[index].set_destination(NULL);
for (int i = 0; i < moves_.length(); ++i) {
LMoveOperands other_move = moves_[i];
if (other_move.Blocks(destination)) {
- ASSERT(other_move.IsPending());
+ DCHECK(other_move.IsPending());
EmitSwap(index);
return;
}
void LGapResolver::Verify() {
-#ifdef ENABLE_SLOW_ASSERTS
+#ifdef ENABLE_SLOW_DCHECKS
// No operand should be the destination for more than one move.
for (int i = 0; i < moves_.length(); ++i) {
LOperand* destination = moves_[i].destination();
for (int j = i + 1; j < moves_.length(); ++j) {
- SLOW_ASSERT(!destination->Equals(moves_[j].destination()));
+ SLOW_DCHECK(!destination->Equals(moves_[j].destination()));
}
}
#endif
Register dst = cgen_->ToRegister(destination);
__ movp(dst, src);
} else {
- ASSERT(destination->IsStackSlot());
+ DCHECK(destination->IsStackSlot());
Operand dst = cgen_->ToOperand(destination);
__ movp(dst, src);
}
Register dst = cgen_->ToRegister(destination);
__ movp(dst, src);
} else {
- ASSERT(destination->IsStackSlot());
+ DCHECK(destination->IsStackSlot());
Operand dst = cgen_->ToOperand(destination);
__ movp(kScratchRegister, src);
__ movp(dst, kScratchRegister);
if (cgen_->IsSmiConstant(constant_source)) {
__ Move(dst, cgen_->ToSmi(constant_source));
} else if (cgen_->IsInteger32Constant(constant_source)) {
- __ Set(dst, static_cast<uint32_t>(cgen_->ToInteger32(constant_source)));
+ int32_t constant = cgen_->ToInteger32(constant_source);
+ // Do sign extension only for constant used as de-hoisted array key.
+ // Others only need zero extension, which saves 2 bytes.
+ if (cgen_->IsDehoistedKeyConstant(constant_source)) {
+ __ Set(dst, constant);
+ } else {
+ __ Set(dst, static_cast<uint32_t>(constant));
+ }
} else {
__ Move(dst, cgen_->ToHandle(constant_source));
}
} else if (destination->IsDoubleRegister()) {
double v = cgen_->ToDouble(constant_source);
- uint64_t int_val = BitCast<uint64_t, double>(v);
+ uint64_t int_val = bit_cast<uint64_t, double>(v);
XMMRegister dst = cgen_->ToDoubleRegister(destination);
if (int_val == 0) {
__ xorps(dst, dst);
__ movq(dst, kScratchRegister);
}
} else {
- ASSERT(destination->IsStackSlot());
+ DCHECK(destination->IsStackSlot());
Operand dst = cgen_->ToOperand(destination);
if (cgen_->IsSmiConstant(constant_source)) {
__ Move(dst, cgen_->ToSmi(constant_source));
} else if (cgen_->IsInteger32Constant(constant_source)) {
- // Zero top 32 bits of a 64 bit spill slot that holds a 32 bit untagged
- // value.
+ // Do sign extension to 64 bits when stored into stack slot.
__ movp(dst, Immediate(cgen_->ToInteger32(constant_source)));
} else {
__ Move(kScratchRegister, cgen_->ToHandle(constant_source));
if (destination->IsDoubleRegister()) {
__ movaps(cgen_->ToDoubleRegister(destination), src);
} else {
- ASSERT(destination->IsDoubleStackSlot());
+ DCHECK(destination->IsDoubleStackSlot());
__ movsd(cgen_->ToOperand(destination), src);
}
} else if (source->IsDoubleStackSlot()) {
if (destination->IsDoubleRegister()) {
__ movsd(cgen_->ToDoubleRegister(destination), src);
} else {
- ASSERT(destination->IsDoubleStackSlot());
+ DCHECK(destination->IsDoubleStackSlot());
__ movsd(xmm0, src);
__ movsd(cgen_->ToOperand(destination), xmm0);
}
if (destination->IsSIMD128Register()) {
__ movaps(cgen_->ToSIMD128Register(destination), src);
} else {
- ASSERT(destination->IsSIMD128StackSlot());
+ DCHECK(destination->IsSIMD128StackSlot());
__ movups(cgen_->ToOperand(destination), src);
}
} else if (source->IsSIMD128StackSlot()) {
if (destination->IsSIMD128Register()) {
__ movups(cgen_->ToSIMD128Register(destination), src);
} else {
- ASSERT(destination->IsSIMD128StackSlot());
+ DCHECK(destination->IsSIMD128StackSlot());
__ movups(xmm0, src);
__ movups(cgen_->ToOperand(destination), xmm0);
}
} else if (source->IsDoubleRegister() || destination->IsDoubleRegister()) {
// Swap a double register and a double stack slot.
- ASSERT((source->IsDoubleRegister() && destination->IsDoubleStackSlot()) ||
+ DCHECK((source->IsDoubleRegister() && destination->IsDoubleStackSlot()) ||
(source->IsDoubleStackSlot() && destination->IsDoubleRegister()));
XMMRegister reg = cgen_->ToDoubleRegister(source->IsDoubleRegister()
? source
: destination);
LOperand* other = source->IsDoubleRegister() ? destination : source;
- ASSERT(other->IsDoubleStackSlot());
+ DCHECK(other->IsDoubleStackSlot());
Operand other_operand = cgen_->ToOperand(other);
__ movsd(xmm0, other_operand);
__ movsd(other_operand, reg);
} else if (source->IsSIMD128Register() || destination->IsSIMD128Register()) {
// Swap a xmm register and a xmm stack slot.
- ASSERT((source->IsSIMD128Register() &&
+ DCHECK((source->IsSIMD128Register() &&
destination->IsSIMD128StackSlot()) ||
(source->IsSIMD128StackSlot() &&
destination->IsSIMD128Register()));
? source
: destination);
LOperand* other = source->IsSIMD128Register() ? destination : source;
- ASSERT(other->IsSIMD128StackSlot());
+ DCHECK(other->IsSIMD128StackSlot());
Operand other_operand = cgen_->ToOperand(other);
__ movups(xmm0, other_operand);
__ movups(other_operand, reg);
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