#if V8_TARGET_ARCH_IA32
-#include "src/ia32/lithium-gap-resolver-ia32.h"
#include "src/ia32/lithium-codegen-ia32.h"
+#include "src/ia32/lithium-gap-resolver-ia32.h"
namespace v8 {
namespace internal {
void LGapResolver::Resolve(LParallelMove* parallel_move) {
- ASSERT(HasBeenReset());
+ DCHECK(HasBeenReset());
// Build up a worklist of moves.
BuildInitialMoveList(parallel_move);
// Perform the moves with constant sources.
for (int i = 0; i < moves_.length(); ++i) {
if (!moves_[i].IsEliminated()) {
- ASSERT(moves_[i].source()->IsConstantOperand());
+ DCHECK(moves_[i].source()->IsConstantOperand());
EmitMove(i);
}
}
Finish();
- ASSERT(HasBeenReset());
+ DCHECK(HasBeenReset());
}
// which means that a call to PerformMove could change any source operand
// in the move graph.
- ASSERT(!moves_[index].IsPending());
- ASSERT(!moves_[index].IsRedundant());
+ DCHECK(!moves_[index].IsPending());
+ DCHECK(!moves_[index].IsRedundant());
// Clear this move's destination to indicate a pending move. The actual
// destination is saved on the side.
- ASSERT(moves_[index].source() != NULL); // Or else it will look eliminated.
+ DCHECK(moves_[index].source() != NULL); // Or else it will look eliminated.
LOperand* destination = moves_[index].destination();
moves_[index].set_destination(NULL);
for (int i = 0; i < moves_.length(); ++i) {
LMoveOperands other_move = moves_[i];
if (other_move.Blocks(destination)) {
- ASSERT(other_move.IsPending());
+ DCHECK(other_move.IsPending());
EmitSwap(index);
return;
}
LOperand* source = moves_[index].source();
if (source->IsRegister()) {
--source_uses_[source->index()];
- ASSERT(source_uses_[source->index()] >= 0);
+ DCHECK(source_uses_[source->index()] >= 0);
}
LOperand* destination = moves_[index].destination();
if (destination->IsRegister()) {
--destination_uses_[destination->index()];
- ASSERT(destination_uses_[destination->index()] >= 0);
+ DCHECK(destination_uses_[destination->index()] >= 0);
}
moves_[index].Eliminate();
void LGapResolver::Verify() {
-#ifdef ENABLE_SLOW_ASSERTS
+#ifdef ENABLE_SLOW_DCHECKS
// No operand should be the destination for more than one move.
for (int i = 0; i < moves_.length(); ++i) {
LOperand* destination = moves_[i].destination();
for (int j = i + 1; j < moves_.length(); ++j) {
- SLOW_ASSERT(!destination->Equals(moves_[j].destination()));
+ SLOW_DCHECK(!destination->Equals(moves_[j].destination()));
}
}
#endif
// Dispatch on the source and destination operand kinds. Not all
// combinations are possible.
if (source->IsRegister()) {
- ASSERT(destination->IsRegister() || destination->IsStackSlot());
+ DCHECK(destination->IsRegister() || destination->IsStackSlot());
Register src = cgen_->ToRegister(source);
Operand dst = cgen_->ToOperand(destination);
__ mov(dst, src);
} else if (source->IsStackSlot()) {
- ASSERT(destination->IsRegister() || destination->IsStackSlot());
+ DCHECK(destination->IsRegister() || destination->IsStackSlot());
Operand src = cgen_->ToOperand(source);
if (destination->IsRegister()) {
Register dst = cgen_->ToRegister(destination);
}
} else if (destination->IsDoubleRegister()) {
double v = cgen_->ToDouble(constant_source);
- uint64_t int_val = BitCast<uint64_t, double>(v);
+ uint64_t int_val = bit_cast<uint64_t, double>(v);
int32_t lower = static_cast<int32_t>(int_val);
int32_t upper = static_cast<int32_t>(int_val >> kBitsPerInt);
XMMRegister dst = cgen_->ToDoubleRegister(destination);
__ add(esp, Immediate(kDoubleSize));
}
} else {
- ASSERT(destination->IsStackSlot());
+ DCHECK(destination->IsStackSlot());
Operand dst = cgen_->ToOperand(destination);
Representation r = cgen_->IsSmi(constant_source)
? Representation::Smi() : Representation::Integer32();
XMMRegister dst = cgen_->ToDoubleRegister(destination);
__ movaps(dst, src);
} else {
- ASSERT(destination->IsDoubleStackSlot());
+ DCHECK(destination->IsDoubleStackSlot());
Operand dst = cgen_->ToOperand(destination);
__ movsd(dst, src);
}
} else if (source->IsDoubleStackSlot()) {
- ASSERT(destination->IsDoubleRegister() ||
+ DCHECK(destination->IsDoubleRegister() ||
destination->IsDoubleStackSlot());
Operand src = cgen_->ToOperand(source);
if (destination->IsDoubleRegister()) {
if (destination->IsSIMD128Register()) {
__ movaps(cgen_->ToSIMD128Register(destination), src);
} else {
- ASSERT(destination->IsSIMD128StackSlot());
+ DCHECK(destination->IsSIMD128StackSlot());
__ movups(cgen_->ToOperand(destination), src);
}
} else if (source->IsSIMD128StackSlot()) {
if (destination->IsSIMD128Register()) {
__ movups(cgen_->ToSIMD128Register(destination), src);
} else {
- ASSERT(destination->IsSIMD128StackSlot());
+ DCHECK(destination->IsSIMD128StackSlot());
__ movups(xmm0, src);
__ movups(cgen_->ToOperand(destination), xmm0);
}
} else if (source->IsDoubleRegister() || destination->IsDoubleRegister()) {
// XMM register-memory swap. We rely on having xmm0
// available as a fixed scratch register.
- ASSERT(source->IsDoubleStackSlot() || destination->IsDoubleStackSlot());
+ DCHECK(source->IsDoubleStackSlot() || destination->IsDoubleStackSlot());
XMMRegister reg = cgen_->ToDoubleRegister(source->IsDoubleRegister()
? source
: destination);
} else if (source->IsSIMD128Register() || destination->IsSIMD128Register()) {
// Swap a xmm register and a xmm stack slot.
- ASSERT((source->IsSIMD128Register() &&
+ DCHECK((source->IsSIMD128Register() &&
destination->IsSIMD128StackSlot()) ||
(source->IsSIMD128StackSlot() &&
destination->IsSIMD128Register()));
? source
: destination);
LOperand* other = source->IsSIMD128Register() ? destination : source;
- ASSERT(other->IsSIMD128StackSlot());
+ DCHECK(other->IsSIMD128StackSlot());
Operand other_operand = cgen_->ToOperand(other);
__ movups(xmm0, other_operand);
__ movups(other_operand, reg);