use g_enable_cache_ctrl for cache control

[platform/adaptation/samsung_exynos/libtbm-exynos.git] / src / tbm_bufmgr_tgl.h

diff --git a/src/tbm_bufmgr_tgl.h b/src/tbm_bufmgr_tgl.h
index 0ad453c..b442f73 100644 (file)
--- a/src/tbm_bufmgr_tgl.h
+++ b/src/tbm_bufmgr_tgl.h
@@ -34,10 +34,8 @@
 
 #include <linux/ioctl.h>
 
-#ifdef ENABLE_CACHECTRL
 static char tgl_devfile[] = "/dev/slp_global_lock";
 static char tgl_devfile1[] = "/dev/tgl";
-#endif
 
 #define TGL_IOCTL_BASE         0x32
 #define TGL_IO(nr)                     _IO(TGL_IOCTL_BASE, nr)
@@ -125,7 +123,6 @@ enum {
 /* get user data with key */
 #define TGL_IOCTL_GET_DATA             TGL_IOR(_TGL_GET_DATA, struct tgl_usr_data)
 
-#ifdef ENABLE_CACHECTRL
 /* indicate cache units. */
 enum e_drm_exynos_gem_cache_sel {
        EXYNOS_DRM_L1_CACHE             = 1 << 0,
@@ -175,6 +172,4 @@ struct drm_exynos_gem_cache_op {
 #define DRM_IOCTL_EXYNOS_GEM_CACHE_OP  DRM_IOWR(DRM_COMMAND_BASE + \
                DRM_EXYNOS_GEM_CACHE_OP, struct drm_exynos_gem_cache_op)
 
-#endif
-
 #endif                                                 /* __TBM_BUFMGR_TGL_H__ */