{ RADEON_PP_TEX_SIZE_0, 2, "RADEON_PP_TEX_SIZE_0" },
{ RADEON_PP_TEX_SIZE_1, 2, "RADEON_PP_TEX_SIZE_1" },
{ RADEON_PP_TEX_SIZE_2, 2, "RADEON_PP_TEX_SIZE_2" },
+ { 0, 3, "R200_RB3D_BLENDCOLOR" },
+ { 0, 1, "R200_SE_TCL_POINT_SPRITE_CNTL" },
+
};
struct reg_names {