Marking SSE HWIntrinsics as fully implemented

[platform/upstream/coreclr.git] / src / jit / hwintrinsicxarch.cpp

diff --git a/src/jit/hwintrinsicxarch.cpp b/src/jit/hwintrinsicxarch.cpp
index 80091f1..d8ac1ae 100644 (file)
--- a/src/jit/hwintrinsicxarch.cpp
+++ b/src/jit/hwintrinsicxarch.cpp
@@ -308,7 +308,6 @@ bool Compiler::isFullyImplmentedISAClass(InstructionSet isa)
 {
     switch (isa)
     {
-        case InstructionSet_SSE:
         case InstructionSet_SSE2:
         case InstructionSet_SSE3:
         case InstructionSet_SSSE3:
@@ -323,6 +322,7 @@ bool Compiler::isFullyImplmentedISAClass(InstructionSet isa)
         case InstructionSet_PCLMULQDQ:
             return false;
 
+        case InstructionSet_SSE:
         case InstructionSet_LZCNT:
         case InstructionSet_POPCNT:
             return true;
@@ -531,7 +531,17 @@ GenTree* Compiler::impX86HWIntrinsic(NamedIntrinsic        intrinsic,
     {
         if (!varTypeIsSIMD(retType))
         {
-            baseType = getBaseTypeOfSIMDType(info.compCompHnd->getArgClass(sig, sig->args));
+            if (retType != TYP_VOID)
+            {
+                baseType = getBaseTypeOfSIMDType(info.compCompHnd->getArgClass(sig, sig->args));
+            }
+            else
+            {
+                assert(category == HW_Category_MemoryStore);
+                baseType =
+                    getBaseTypeOfSIMDType(info.compCompHnd->getArgClass(sig, info.compCompHnd->getArgNext(sig->args)));
+            }
+
             assert(baseType != TYP_UNKNOWN);
         }