Merge pull request #16832 from dotnetrt/StoreNonTemporal

[platform/upstream/coreclr.git] / src / jit / hwintrinsicxarch.cpp

diff --git a/src/jit/hwintrinsicxarch.cpp b/src/jit/hwintrinsicxarch.cpp
index fd228d7..56c7e99 100644 (file)
--- a/src/jit/hwintrinsicxarch.cpp
+++ b/src/jit/hwintrinsicxarch.cpp
@@ -546,7 +546,6 @@ bool Compiler::isFullyImplmentedISAClass(InstructionSet isa)
 {
     switch (isa)
     {
-        case InstructionSet_SSE2:
         case InstructionSet_SSE42:
         case InstructionSet_AVX:
         case InstructionSet_AVX2:
@@ -558,6 +557,7 @@ bool Compiler::isFullyImplmentedISAClass(InstructionSet isa)
             return false;
 
         case InstructionSet_SSE:
+        case InstructionSet_SSE2:
         case InstructionSet_SSE3:
         case InstructionSet_SSSE3:
         case InstructionSet_SSE41:
@@ -1005,6 +1005,16 @@ GenTree* Compiler::impSSE2Intrinsic(NamedIntrinsic        intrinsic,
             break;
         }
 
+        case NI_SSE2_StoreNonTemporal:
+        {
+            assert(sig->numArgs == 2);
+            assert(JITtype2varType(sig->retType) == TYP_VOID);
+            op2     = impPopStack().val;
+            op1     = impPopStack().val;
+            retNode = gtNewSimdHWIntrinsicNode(TYP_VOID, op1, op2, NI_SSE2_StoreNonTemporal, op2->TypeGet(), 0);
+            break;
+        }
+
         default:
             JITDUMP("Not implemented hardware intrinsic");
             break;