Update NEWS for 1.4.0

[platform/upstream/libva-intel-driver.git] / src / gen6_mfc.c

diff --git a/src/gen6_mfc.c b/src/gen6_mfc.c
index 987fa52..455721f 100644 (file)
--- a/src/gen6_mfc.c
+++ b/src/gen6_mfc.c
@@ -788,15 +788,18 @@ gen6_mfc_avc_pipeline_slice_programing(VADriverContextP ctx,
     int i,x,y;
     int qp = pPicParameter->pic_init_qp + pSliceParameter->slice_qp_delta;
     unsigned int rate_control_mode = encoder_context->rate_control_mode;
-    unsigned char *slice_header = NULL;
-    int slice_header_length_in_bits = 0;
     unsigned int tail_data[] = { 0x0, 0x0 };
     int slice_type = intel_avc_enc_slice_type_fixup(pSliceParameter->slice_type);
     int is_intra = slice_type == SLICE_TYPE_I;
+    int qp_slice;
 
+    qp_slice = qp;
     if (rate_control_mode == VA_RC_CBR) {
         qp = mfc_context->bit_rate_control_context[slice_type].QpPrimeY;
-        pSliceParameter->slice_qp_delta = qp - pPicParameter->pic_init_qp;
+        if (encode_state->slice_header_index[slice_index] == 0) {
+            pSliceParameter->slice_qp_delta = qp - pPicParameter->pic_init_qp;
+            qp_slice = qp;
+        }
     }
 
     /* only support for 8-bit pixel bit-depth */
@@ -809,18 +812,12 @@ gen6_mfc_avc_pipeline_slice_programing(VADriverContextP ctx,
                              pPicParameter,
                              pSliceParameter,
                              encode_state, encoder_context,
-                             (rate_control_mode == VA_RC_CBR), qp, slice_batch);
+                             (rate_control_mode == VA_RC_CBR), qp_slice, slice_batch);
 
     if ( slice_index == 0) 
         intel_mfc_avc_pipeline_header_programing(ctx, encode_state, encoder_context, slice_batch);
 
-    slice_header_length_in_bits = build_avc_slice_header(pSequenceParameter, pPicParameter, pSliceParameter, &slice_header);
-
-    // slice hander
-    mfc_context->insert_object(ctx, encoder_context,
-                               (unsigned int *)slice_header, ALIGN(slice_header_length_in_bits, 32) >> 5, slice_header_length_in_bits & 0x1f,
-                               5,  /* first 5 bytes are start code + nal unit type */
-                               1, 0, 1, slice_batch);
+    intel_avc_slice_insert_packed_data(ctx, encode_state, encoder_context, slice_index, slice_batch);
 
     dri_bo_map(vme_context->vme_output.bo , 1);
     msg = (unsigned int *)vme_context->vme_output.bo->virtual;
@@ -867,7 +864,6 @@ gen6_mfc_avc_pipeline_slice_programing(VADriverContextP ctx,
                                    1, 1, 1, 0, slice_batch);
     }
 
-    free(slice_header);
 
 }
 
@@ -1174,17 +1170,21 @@ gen6_mfc_avc_batchbuffer_slice(VADriverContextP ctx,
     int last_slice = (pSliceParameter->macroblock_address + pSliceParameter->num_macroblocks) == (width_in_mbs * height_in_mbs);
     int qp = pPicParameter->pic_init_qp + pSliceParameter->slice_qp_delta;
     unsigned int rate_control_mode = encoder_context->rate_control_mode;
-    unsigned char *slice_header = NULL;
-    int slice_header_length_in_bits = 0;
     unsigned int tail_data[] = { 0x0, 0x0 };
     long head_offset;
     int old_used = intel_batchbuffer_used_size(slice_batch), used;
     unsigned short head_size, tail_size;
     int slice_type = intel_avc_enc_slice_type_fixup(pSliceParameter->slice_type);
+    int qp_slice;
 
+    qp_slice = qp;
     if (rate_control_mode == VA_RC_CBR) {
         qp = mfc_context->bit_rate_control_context[slice_type].QpPrimeY;
-        pSliceParameter->slice_qp_delta = qp - pPicParameter->pic_init_qp;
+        if (encode_state->slice_header_index[slice_index] == 0) {
+            pSliceParameter->slice_qp_delta = qp - pPicParameter->pic_init_qp;
+            /* Use the adjusted qp when slice_header is generated by driver */
+            qp_slice = qp;
+        }
     }
 
     /* only support for 8-bit pixel bit-depth */
@@ -1200,26 +1200,13 @@ gen6_mfc_avc_batchbuffer_slice(VADriverContextP ctx,
                              encode_state,
                              encoder_context,
                              (rate_control_mode == VA_RC_CBR),
-                             qp,
+                             qp_slice,
                              slice_batch);
 
     if (slice_index == 0)
         intel_mfc_avc_pipeline_header_programing(ctx, encode_state, encoder_context, slice_batch);
 
-    slice_header_length_in_bits = build_avc_slice_header(pSequenceParameter, pPicParameter, pSliceParameter, &slice_header);
-
-    // slice hander
-    mfc_context->insert_object(ctx,
-                               encoder_context,
-                               (unsigned int *)slice_header,
-                               ALIGN(slice_header_length_in_bits, 32) >> 5,
-                               slice_header_length_in_bits & 0x1f,
-                               5,  /* first 5 bytes are start code + nal unit type */
-                               1,
-                               0,
-                               1,
-                               slice_batch);
-    free(slice_header);
+    intel_avc_slice_insert_packed_data(ctx, encode_state, encoder_context, slice_index, slice_batch);
 
     intel_batchbuffer_align(slice_batch, 16); /* aligned by an Oword */
     used = intel_batchbuffer_used_size(slice_batch);
@@ -1480,6 +1467,9 @@ Bool gen6_mfc_context_init(VADriverContextP ctx, struct intel_encoder_context *e
 {
     struct gen6_mfc_context *mfc_context = calloc(1, sizeof(struct gen6_mfc_context));
 
+    if (!mfc_context)
+        return False;
+
     mfc_context->gpe_context.surface_state_binding_table.length = (SURFACE_STATE_PADDED_SIZE + sizeof(unsigned int)) * MAX_MEDIA_SURFACES_GEN6;
 
     mfc_context->gpe_context.idrt.max_entries = MAX_GPE_KERNELS;