binutils/

[external/binutils.git] / sim / testsuite / sim / sh / testutils.inc

diff --git a/sim/testsuite/sim/sh/testutils.inc b/sim/testsuite/sim/sh/testutils.inc
index 736934c..c9644b4 100644 (file)
--- a/sim/testsuite/sim/sh/testutils.inc
+++ b/sim/testsuite/sim/sh/testutils.inc
@@ -205,6 +205,19 @@ main:
        bra     mfail
        nop
        .endm
+       # Branch if false -- 8k range
+       .macro bf8k label
+       bt      .Lbf8k\@
+       bra     \label
+.Lbf8k\@:
+       .endm
+
+       # Branch if true -- 8k range
+       .macro bt8k label
+       bf      .Lbt8k\@
+       bra     \label
+.Lbt8k\@:
+       .endm
 
        # Assert value of register (any general register but r0)
        # Preserves r0 on stack, restores it on success.
@@ -485,9 +498,9 @@ set_greg\@:
        bra     .Lsrbit\@
        nop
        .align 2
-.Lsrbitval:
+.Lsrbitval\@:
        .long   \val
-.Lsrbit:
+.Lsrbit\@:
        .endm
 
        .macro  test_sr_bit_set val
@@ -559,7 +572,7 @@ set_greg\@:
 
 
        .macro set_creg val reg
-       # 
+       # [gbr, vbr, ssr, spc, sgr, dbr... ]
        push    r0
        mov.l   .Lscrval\@, r0
        ldc     r0, \reg
@@ -589,3 +602,16 @@ set_greg\@:
        lds     r0, dsr
        pop     r0
        .endm
+
+       .macro  assertmem addr val
+       push    r0
+       mov.l   .Laddr\@, r0
+       mov.l   @r0, r0
+       assertreg0 \val
+       bra     .Lam\@
+       nop
+       .align  2
+.Laddr\@:
+       .long   \addr
+.Lam\@:        pop     r0
+       .endm