* elf64-ppc.c (dec_dynrel_count): Don't error when elf_gc_sweep_symbol

[external/binutils.git] / sim / testsuite / sim / fr30 / int.cgs

diff --git a/sim/testsuite/sim/fr30/int.cgs b/sim/testsuite/sim/fr30/int.cgs
index a48bca9..7cdca7b 100644 (file)
--- a/sim/testsuite/sim/fr30/int.cgs
+++ b/sim/testsuite/sim/fr30/int.cgs
@@ -1,4 +1,4 @@
-# fr30 testcase for add $u8
+# fr30 testcase for int $u8
 # mach(): fr30
 
        .include "testutils.inc"
@@ -6,15 +6,30 @@
        START
 
        .text
-       .global add
-add:
-       ; Test add $Rj,$Ri
-       mvi_h_gr        1,r7
-       mvi_h_gr        2,r8
-       set_cc          0x0f            ; Set mask opposite of expected
-       add             r7,r8
-       test_cc         0 0 0 0
-       test_h_gr       3,r8
+       .global int
+int:
+       ; Test int $u8 - setup and test an interrupt #0xfd (randomly chosen)
+       mvr_h_gr        tbr,r7
+       inci_h_gr       8,r7
+       mvi_h_mem       pass,r7
+       mvi_h_gr        doint,r9
+       inci_h_gr       2,r9
+       mvr_h_gr        ssp,r10
+       set_cc          0x0f            ; Condition codes should not change
+       set_s_user                      ; Set opposite of expected
+       set_i           1               ; Set opposite of expected
+       mvr_h_gr        ps,r8
+doint: int             0xfd
+       fail
 
+pass:
+       test_cc         1 1 1 1
+       test_s_system
+       test_i          0
+       inci_h_gr       -4,r10
+       testr_h_mem     r8,r10
+       inci_h_gr       -4,r10
+       testr_h_mem     r9,r10
+       testr_h_dr      r10,ssp
 
        pass