Support R_SPARC_WDISP10 and R_SPARC_H34.

[external/binutils.git] / sim / iq2000 / decode.c

diff --git a/sim/iq2000/decode.c b/sim/iq2000/decode.c
index 1bb77b1..be66221 100644 (file)
--- a/sim/iq2000/decode.c
+++ b/sim/iq2000/decode.c
@@ -2,7 +2,7 @@
 
 THIS FILE IS MACHINE GENERATED WITH CGEN.
 
-Copyright 1996-2009 Free Software Foundation, Inc.
+Copyright 1996-2010, 2012 Free Software Foundation, Inc.
 
 This file is part of the GNU simulators.
 
@@ -192,7 +192,8 @@ static const struct insn_sem iq2000bf_insn_sem[] =
   { IQ2000_INSN_BMB, IQ2000BF_INSN_BMB, IQ2000BF_SFMT_BBV },
 };
 
-static const struct insn_sem iq2000bf_insn_sem_invalid = {
+static const struct insn_sem iq2000bf_insn_sem_invalid =
+{
   VIRTUAL_INSN_X_INVALID, IQ2000BF_INSN_X_INVALID, IQ2000BF_SFMT_EMPTY
 };
 
@@ -256,14 +257,14 @@ iq2000bf_init_idesc_table (SIM_CPU *cpu)
 
 const IDESC *
 iq2000bf_decode (SIM_CPU *current_cpu, IADDR pc,
-              CGEN_INSN_INT base_insn, CGEN_INSN_INT entire_insn,
+              CGEN_INSN_WORD base_insn, CGEN_INSN_WORD entire_insn,
               ARGBUF *abuf)
 {
   /* Result of decoder.  */
   IQ2000BF_INSN_TYPE itype;
 
   {
-    CGEN_INSN_INT insn = base_insn;
+    CGEN_INSN_WORD insn = base_insn;
 
     {
       unsigned int val = (((insn >> 26) & (63 << 0)));
@@ -879,7 +880,7 @@ iq2000bf_decode (SIM_CPU *current_cpu, IADDR pc,
  extract_sfmt_empty:
   {
     const IDESC *idesc = &iq2000bf_insn_data[itype];
-#define FLD(f) abuf->fields.fmt_empty.f
+#define FLD(f) abuf->fields.sfmt_empty.f
 
 
   /* Record the fields for the semantic handler.  */
@@ -892,7 +893,7 @@ iq2000bf_decode (SIM_CPU *current_cpu, IADDR pc,
  extract_sfmt_add:
   {
     const IDESC *idesc = &iq2000bf_insn_data[itype];
-    CGEN_INSN_INT insn = entire_insn;
+    CGEN_INSN_WORD insn = entire_insn;
 #define FLD(f) abuf->fields.sfmt_mrgb.f
     UINT f_rs;
     UINT f_rt;
@@ -915,7 +916,7 @@ iq2000bf_decode (SIM_CPU *current_cpu, IADDR pc,
  extract_sfmt_addi:
   {
     const IDESC *idesc = &iq2000bf_insn_data[itype];
-    CGEN_INSN_INT insn = entire_insn;
+    CGEN_INSN_WORD insn = entire_insn;
 #define FLD(f) abuf->fields.sfmt_addi.f
     UINT f_rs;
     UINT f_rt;
@@ -938,7 +939,7 @@ iq2000bf_decode (SIM_CPU *current_cpu, IADDR pc,
  extract_sfmt_ram:
   {
     const IDESC *idesc = &iq2000bf_insn_data[itype];
-    CGEN_INSN_INT insn = entire_insn;
+    CGEN_INSN_WORD insn = entire_insn;
 #define FLD(f) abuf->fields.sfmt_ram.f
     UINT f_rs;
     UINT f_rt;
@@ -967,7 +968,7 @@ iq2000bf_decode (SIM_CPU *current_cpu, IADDR pc,
  extract_sfmt_sll:
   {
     const IDESC *idesc = &iq2000bf_insn_data[itype];
-    CGEN_INSN_INT insn = entire_insn;
+    CGEN_INSN_WORD insn = entire_insn;
 #define FLD(f) abuf->fields.sfmt_ram.f
     UINT f_rt;
     UINT f_rd;
@@ -990,7 +991,7 @@ iq2000bf_decode (SIM_CPU *current_cpu, IADDR pc,
  extract_sfmt_slmv:
   {
     const IDESC *idesc = &iq2000bf_insn_data[itype];
-    CGEN_INSN_INT insn = entire_insn;
+    CGEN_INSN_WORD insn = entire_insn;
 #define FLD(f) abuf->fields.sfmt_ram.f
     UINT f_rs;
     UINT f_rt;
@@ -1016,7 +1017,7 @@ iq2000bf_decode (SIM_CPU *current_cpu, IADDR pc,
  extract_sfmt_slt:
   {
     const IDESC *idesc = &iq2000bf_insn_data[itype];
-    CGEN_INSN_INT insn = entire_insn;
+    CGEN_INSN_WORD insn = entire_insn;
 #define FLD(f) abuf->fields.sfmt_mrgb.f
     UINT f_rs;
     UINT f_rt;
@@ -1039,7 +1040,7 @@ iq2000bf_decode (SIM_CPU *current_cpu, IADDR pc,
  extract_sfmt_slti:
   {
     const IDESC *idesc = &iq2000bf_insn_data[itype];
-    CGEN_INSN_INT insn = entire_insn;
+    CGEN_INSN_WORD insn = entire_insn;
 #define FLD(f) abuf->fields.sfmt_addi.f
     UINT f_rs;
     UINT f_rt;
@@ -1062,7 +1063,7 @@ iq2000bf_decode (SIM_CPU *current_cpu, IADDR pc,
  extract_sfmt_bbi:
   {
     const IDESC *idesc = &iq2000bf_insn_data[itype];
-    CGEN_INSN_INT insn = entire_insn;
+    CGEN_INSN_WORD insn = entire_insn;
 #define FLD(f) abuf->fields.sfmt_bbi.f
     UINT f_rs;
     UINT f_rt;
@@ -1070,7 +1071,7 @@ iq2000bf_decode (SIM_CPU *current_cpu, IADDR pc,
 
     f_rs = EXTRACT_LSB0_UINT (insn, 32, 25, 5);
     f_rt = EXTRACT_LSB0_UINT (insn, 32, 20, 5);
-    f_offset = ((((EXTRACT_LSB0_INT (insn, 32, 15, 16)) << (2))) + (((pc) + (4))));
+    f_offset = ((((EXTRACT_LSB0_SINT (insn, 32, 15, 16)) << (2))) + (((pc) + (4))));
 
   /* Record the fields for the semantic handler.  */
   FLD (f_rt) = f_rt;
@@ -1091,7 +1092,7 @@ iq2000bf_decode (SIM_CPU *current_cpu, IADDR pc,
  extract_sfmt_bbv:
   {
     const IDESC *idesc = &iq2000bf_insn_data[itype];
-    CGEN_INSN_INT insn = entire_insn;
+    CGEN_INSN_WORD insn = entire_insn;
 #define FLD(f) abuf->fields.sfmt_bbi.f
     UINT f_rs;
     UINT f_rt;
@@ -1099,7 +1100,7 @@ iq2000bf_decode (SIM_CPU *current_cpu, IADDR pc,
 
     f_rs = EXTRACT_LSB0_UINT (insn, 32, 25, 5);
     f_rt = EXTRACT_LSB0_UINT (insn, 32, 20, 5);
-    f_offset = ((((EXTRACT_LSB0_INT (insn, 32, 15, 16)) << (2))) + (((pc) + (4))));
+    f_offset = ((((EXTRACT_LSB0_SINT (insn, 32, 15, 16)) << (2))) + (((pc) + (4))));
 
   /* Record the fields for the semantic handler.  */
   FLD (f_rs) = f_rs;
@@ -1120,13 +1121,13 @@ iq2000bf_decode (SIM_CPU *current_cpu, IADDR pc,
  extract_sfmt_bgez:
   {
     const IDESC *idesc = &iq2000bf_insn_data[itype];
-    CGEN_INSN_INT insn = entire_insn;
+    CGEN_INSN_WORD insn = entire_insn;
 #define FLD(f) abuf->fields.sfmt_bbi.f
     UINT f_rs;
     SI f_offset;
 
     f_rs = EXTRACT_LSB0_UINT (insn, 32, 25, 5);
-    f_offset = ((((EXTRACT_LSB0_INT (insn, 32, 15, 16)) << (2))) + (((pc) + (4))));
+    f_offset = ((((EXTRACT_LSB0_SINT (insn, 32, 15, 16)) << (2))) + (((pc) + (4))));
 
   /* Record the fields for the semantic handler.  */
   FLD (f_rs) = f_rs;
@@ -1146,13 +1147,13 @@ iq2000bf_decode (SIM_CPU *current_cpu, IADDR pc,
  extract_sfmt_bgezal:
   {
     const IDESC *idesc = &iq2000bf_insn_data[itype];
-    CGEN_INSN_INT insn = entire_insn;
+    CGEN_INSN_WORD insn = entire_insn;
 #define FLD(f) abuf->fields.sfmt_bbi.f
     UINT f_rs;
     SI f_offset;
 
     f_rs = EXTRACT_LSB0_UINT (insn, 32, 25, 5);
-    f_offset = ((((EXTRACT_LSB0_INT (insn, 32, 15, 16)) << (2))) + (((pc) + (4))));
+    f_offset = ((((EXTRACT_LSB0_SINT (insn, 32, 15, 16)) << (2))) + (((pc) + (4))));
 
   /* Record the fields for the semantic handler.  */
   FLD (f_rs) = f_rs;
@@ -1172,7 +1173,7 @@ iq2000bf_decode (SIM_CPU *current_cpu, IADDR pc,
  extract_sfmt_jalr:
   {
     const IDESC *idesc = &iq2000bf_insn_data[itype];
-    CGEN_INSN_INT insn = entire_insn;
+    CGEN_INSN_WORD insn = entire_insn;
 #define FLD(f) abuf->fields.sfmt_mrgb.f
     UINT f_rs;
     UINT f_rd;
@@ -1198,7 +1199,7 @@ iq2000bf_decode (SIM_CPU *current_cpu, IADDR pc,
  extract_sfmt_jr:
   {
     const IDESC *idesc = &iq2000bf_insn_data[itype];
-    CGEN_INSN_INT insn = entire_insn;
+    CGEN_INSN_WORD insn = entire_insn;
 #define FLD(f) abuf->fields.sfmt_bbi.f
     UINT f_rs;
 
@@ -1221,7 +1222,7 @@ iq2000bf_decode (SIM_CPU *current_cpu, IADDR pc,
  extract_sfmt_lb:
   {
     const IDESC *idesc = &iq2000bf_insn_data[itype];
-    CGEN_INSN_INT insn = entire_insn;
+    CGEN_INSN_WORD insn = entire_insn;
 #define FLD(f) abuf->fields.sfmt_addi.f
     UINT f_rs;
     UINT f_rt;
@@ -1244,7 +1245,7 @@ iq2000bf_decode (SIM_CPU *current_cpu, IADDR pc,
  extract_sfmt_lh:
   {
     const IDESC *idesc = &iq2000bf_insn_data[itype];
-    CGEN_INSN_INT insn = entire_insn;
+    CGEN_INSN_WORD insn = entire_insn;
 #define FLD(f) abuf->fields.sfmt_addi.f
     UINT f_rs;
     UINT f_rt;
@@ -1267,7 +1268,7 @@ iq2000bf_decode (SIM_CPU *current_cpu, IADDR pc,
  extract_sfmt_lui:
   {
     const IDESC *idesc = &iq2000bf_insn_data[itype];
-    CGEN_INSN_INT insn = entire_insn;
+    CGEN_INSN_WORD insn = entire_insn;
 #define FLD(f) abuf->fields.sfmt_addi.f
     UINT f_rt;
     UINT f_imm;
@@ -1287,7 +1288,7 @@ iq2000bf_decode (SIM_CPU *current_cpu, IADDR pc,
  extract_sfmt_lw:
   {
     const IDESC *idesc = &iq2000bf_insn_data[itype];
-    CGEN_INSN_INT insn = entire_insn;
+    CGEN_INSN_WORD insn = entire_insn;
 #define FLD(f) abuf->fields.sfmt_addi.f
     UINT f_rs;
     UINT f_rt;
@@ -1310,7 +1311,7 @@ iq2000bf_decode (SIM_CPU *current_cpu, IADDR pc,
  extract_sfmt_sb:
   {
     const IDESC *idesc = &iq2000bf_insn_data[itype];
-    CGEN_INSN_INT insn = entire_insn;
+    CGEN_INSN_WORD insn = entire_insn;
 #define FLD(f) abuf->fields.sfmt_addi.f
     UINT f_rs;
     UINT f_rt;
@@ -1333,7 +1334,7 @@ iq2000bf_decode (SIM_CPU *current_cpu, IADDR pc,
  extract_sfmt_sh:
   {
     const IDESC *idesc = &iq2000bf_insn_data[itype];
-    CGEN_INSN_INT insn = entire_insn;
+    CGEN_INSN_WORD insn = entire_insn;
 #define FLD(f) abuf->fields.sfmt_addi.f
     UINT f_rs;
     UINT f_rt;
@@ -1356,7 +1357,7 @@ iq2000bf_decode (SIM_CPU *current_cpu, IADDR pc,
  extract_sfmt_sw:
   {
     const IDESC *idesc = &iq2000bf_insn_data[itype];
-    CGEN_INSN_INT insn = entire_insn;
+    CGEN_INSN_WORD insn = entire_insn;
 #define FLD(f) abuf->fields.sfmt_addi.f
     UINT f_rs;
     UINT f_rt;
@@ -1379,7 +1380,7 @@ iq2000bf_decode (SIM_CPU *current_cpu, IADDR pc,
  extract_sfmt_break:
   {
     const IDESC *idesc = &iq2000bf_insn_data[itype];
-#define FLD(f) abuf->fields.fmt_empty.f
+#define FLD(f) abuf->fields.sfmt_empty.f
 
 
   /* Record the fields for the semantic handler.  */
@@ -1398,7 +1399,7 @@ iq2000bf_decode (SIM_CPU *current_cpu, IADDR pc,
  extract_sfmt_syscall:
   {
     const IDESC *idesc = &iq2000bf_insn_data[itype];
-#define FLD(f) abuf->fields.fmt_empty.f
+#define FLD(f) abuf->fields.sfmt_empty.f
 
 
   /* Record the fields for the semantic handler.  */
@@ -1411,7 +1412,7 @@ iq2000bf_decode (SIM_CPU *current_cpu, IADDR pc,
  extract_sfmt_andoui:
   {
     const IDESC *idesc = &iq2000bf_insn_data[itype];
-    CGEN_INSN_INT insn = entire_insn;
+    CGEN_INSN_WORD insn = entire_insn;
 #define FLD(f) abuf->fields.sfmt_addi.f
     UINT f_rs;
     UINT f_rt;
@@ -1434,7 +1435,7 @@ iq2000bf_decode (SIM_CPU *current_cpu, IADDR pc,
  extract_sfmt_mrgb:
   {
     const IDESC *idesc = &iq2000bf_insn_data[itype];
-    CGEN_INSN_INT insn = entire_insn;
+    CGEN_INSN_WORD insn = entire_insn;
 #define FLD(f) abuf->fields.sfmt_mrgb.f
     UINT f_rs;
     UINT f_rt;
@@ -1460,7 +1461,7 @@ iq2000bf_decode (SIM_CPU *current_cpu, IADDR pc,
  extract_sfmt_bctxt:
   {
     const IDESC *idesc = &iq2000bf_insn_data[itype];
-#define FLD(f) abuf->fields.fmt_empty.f
+#define FLD(f) abuf->fields.sfmt_empty.f
 
 
   /* Record the fields for the semantic handler.  */
@@ -1473,7 +1474,7 @@ iq2000bf_decode (SIM_CPU *current_cpu, IADDR pc,
  extract_sfmt_ldw:
   {
     const IDESC *idesc = &iq2000bf_insn_data[itype];
-    CGEN_INSN_INT insn = entire_insn;
+    CGEN_INSN_WORD insn = entire_insn;
 #define FLD(f) abuf->fields.sfmt_addi.f
     UINT f_rs;
     UINT f_rt;
@@ -1496,7 +1497,7 @@ iq2000bf_decode (SIM_CPU *current_cpu, IADDR pc,
  extract_sfmt_sdw:
   {
     const IDESC *idesc = &iq2000bf_insn_data[itype];
-    CGEN_INSN_INT insn = entire_insn;
+    CGEN_INSN_WORD insn = entire_insn;
 #define FLD(f) abuf->fields.sfmt_addi.f
     UINT f_rs;
     UINT f_rt;
@@ -1519,7 +1520,7 @@ iq2000bf_decode (SIM_CPU *current_cpu, IADDR pc,
  extract_sfmt_j:
   {
     const IDESC *idesc = &iq2000bf_insn_data[itype];
-    CGEN_INSN_INT insn = entire_insn;
+    CGEN_INSN_WORD insn = entire_insn;
 #define FLD(f) abuf->fields.sfmt_j.f
     USI f_jtarg;
 
@@ -1542,7 +1543,7 @@ iq2000bf_decode (SIM_CPU *current_cpu, IADDR pc,
  extract_sfmt_jal:
   {
     const IDESC *idesc = &iq2000bf_insn_data[itype];
-    CGEN_INSN_INT insn = entire_insn;
+    CGEN_INSN_WORD insn = entire_insn;
 #define FLD(f) abuf->fields.sfmt_j.f
     USI f_jtarg;