/* Find the exact opcode/arg combo. */
for (q = h8_opcodes; q->name; q++)
{
- op_type *nib = q->data.nib;
+ const op_type *nib = q->data.nib;
unsigned int len = 0;
if ((q->available == AV_H8SX && !h8300sxmode) ||
#endif
/* Fill in the args. */
{
- op_type *args = q->args.nib;
+ const op_type *args = q->args.nib;
int hadone = 0;
int nargs;
break;
case X (OP_POSTINC, SB): /* Register indirect w/post-incr: byte. */
t = GET_L_REG (rn);
- t &= h8_get_mask (sd);
- r = GET_MEMORY_B (t);
+ r = GET_MEMORY_B (t & h8_get_mask (sd));
if (!twice)
t += 1;
- t = t & h8_get_mask (sd);
SET_L_REG (rn, t);
*val = r;
break;
case X (OP_POSTINC, SW): /* Register indirect w/post-incr: word. */
t = GET_L_REG (rn);
- t &= h8_get_mask (sd);
- r = GET_MEMORY_W (t);
+ r = GET_MEMORY_W (t & h8_get_mask (sd));
if (!twice)
t += 2;
- t = t & h8_get_mask (sd);
SET_L_REG (rn, t);
*val = r;
break;
case X (OP_POSTINC, SL): /* Register indirect w/post-incr: long. */
t = GET_L_REG (rn);
- t &= h8_get_mask (sd);
- r = GET_MEMORY_L (t);
+ r = GET_MEMORY_L (t & h8_get_mask (sd));
if (!twice)
t += 4;
- t = t & h8_get_mask (sd);
SET_L_REG (rn, t);
*val = r;
break;
case X (OP_POSTDEC, SB): /* Register indirect w/post-decr: byte. */
t = GET_L_REG (rn);
- t &= h8_get_mask (sd);
- r = GET_MEMORY_B (t);
+ r = GET_MEMORY_B (t & h8_get_mask (sd));
if (!twice)
t -= 1;
- t = t & h8_get_mask (sd);
SET_L_REG (rn, t);
*val = r;
break;
case X (OP_POSTDEC, SW): /* Register indirect w/post-decr: word. */
t = GET_L_REG (rn);
- t &= h8_get_mask (sd);
- r = GET_MEMORY_W (t);
+ r = GET_MEMORY_W (t & h8_get_mask (sd));
if (!twice)
t -= 2;
- t = t & h8_get_mask (sd);
SET_L_REG (rn, t);
*val = r;
break;
case X (OP_POSTDEC, SL): /* Register indirect w/post-decr: long. */
t = GET_L_REG (rn);
- t &= h8_get_mask (sd);
- r = GET_MEMORY_L (t);
+ r = GET_MEMORY_L (t & h8_get_mask (sd));
if (!twice)
t -= 4;
- t = t & h8_get_mask (sd);
SET_L_REG (rn, t);
*val = r;
break;
case X (OP_PREDEC, SB): /* Register indirect w/pre-decr: byte. */
t = GET_L_REG (rn) - 1;
- t &= h8_get_mask (sd);
SET_L_REG (rn, t);
+ t &= h8_get_mask (sd);
*val = GET_MEMORY_B (t);
break;
case X (OP_PREDEC, SW): /* Register indirect w/pre-decr: word. */
t = GET_L_REG (rn) - 2;
- t &= h8_get_mask (sd);
SET_L_REG (rn, t);
+ t &= h8_get_mask (sd);
*val = GET_MEMORY_W (t);
break;
case X (OP_PREDEC, SL): /* Register indirect w/pre-decr: long. */
t = GET_L_REG (rn) - 4;
- t &= h8_get_mask (sd);
SET_L_REG (rn, t);
+ t &= h8_get_mask (sd);
*val = GET_MEMORY_L (t);
break;
case X (OP_PREINC, SB): /* Register indirect w/pre-incr: byte. */
t = GET_L_REG (rn) + 1;
- t &= h8_get_mask (sd);
SET_L_REG (rn, t);
+ t &= h8_get_mask (sd);
*val = GET_MEMORY_B (t);
break;
case X (OP_PREINC, SW): /* Register indirect w/pre-incr: long. */
t = GET_L_REG (rn) + 2;
- t &= h8_get_mask (sd);
SET_L_REG (rn, t);
+ t &= h8_get_mask (sd);
*val = GET_MEMORY_W (t);
break;
case X (OP_PREINC, SL): /* Register indirect w/pre-incr: long. */
t = GET_L_REG (rn) + 4;
- t &= h8_get_mask (sd);
SET_L_REG (rn, t);
+ t &= h8_get_mask (sd);
*val = GET_MEMORY_L (t);
break;
t = GET_L_REG (rn);
if (!twice)
t -= 1;
- t &= h8_get_mask (sd);
SET_L_REG (rn, t);
+ t &= h8_get_mask (sd);
SET_MEMORY_B (t, n);
break;
t = GET_L_REG (rn);
if (!twice)
t -= 2;
- t &= h8_get_mask (sd);
SET_L_REG (rn, t);
+ t &= h8_get_mask (sd);
SET_MEMORY_W (t, n);
break;
t = GET_L_REG (rn);
if (!twice)
t -= 4;
- t &= h8_get_mask (sd);
SET_L_REG (rn, t);
+ t &= h8_get_mask (sd);
SET_MEMORY_L (t, n);
break;
t = GET_L_REG (rn);
if (!twice)
t += 1;
- t &= h8_get_mask (sd);
SET_L_REG (rn, t);
+ t &= h8_get_mask (sd);
SET_MEMORY_B (t, n);
break;
t = GET_L_REG (rn);
if (!twice)
t += 2;
- t &= h8_get_mask (sd);
SET_L_REG (rn, t);
+ t &= h8_get_mask (sd);
SET_MEMORY_W (t, n);
break;
t = GET_L_REG (rn);
if (!twice)
t += 4;
- t &= h8_get_mask (sd);
SET_L_REG (rn, t);
+ t &= h8_get_mask (sd);
SET_MEMORY_L (t, n);
break;
case X (OP_POSTDEC, SB): /* Register indirect w/post-decr, byte. */
- t = GET_L_REG (rn) & h8_get_mask (sd);
- SET_MEMORY_B (t, n);
+ t = GET_L_REG (rn);
SET_L_REG (rn, t - 1);
+ t &= h8_get_mask (sd);
+ SET_MEMORY_B (t, n);
break;
case X (OP_POSTDEC, SW): /* Register indirect w/post-decr, word. */
- t = GET_L_REG (rn) & h8_get_mask (sd);
- SET_MEMORY_W (t, n);
+ t = GET_L_REG (rn);
SET_L_REG (rn, t - 2);
+ t &= h8_get_mask (sd);
+ SET_MEMORY_W (t, n);
break;
case X (OP_POSTDEC, SL): /* Register indirect w/post-decr, long. */
- t = GET_L_REG (rn) & h8_get_mask (sd);
- SET_MEMORY_L (t, n);
+ t = GET_L_REG (rn);
SET_L_REG (rn, t - 4);
+ t &= h8_get_mask (sd);
+ SET_MEMORY_L (t, n);
break;
case X (OP_POSTINC, SB): /* Register indirect w/post-incr, byte. */
- t = GET_L_REG (rn) & h8_get_mask (sd);
- SET_MEMORY_B (t, n);
+ t = GET_L_REG (rn);
SET_L_REG (rn, t + 1);
+ t &= h8_get_mask (sd);
+ SET_MEMORY_B (t, n);
break;
case X (OP_POSTINC, SW): /* Register indirect w/post-incr, word. */
- t = GET_L_REG (rn) & h8_get_mask (sd);
- SET_MEMORY_W (t, n);
+ t = GET_L_REG (rn);
SET_L_REG (rn, t + 2);
+ t &= h8_get_mask (sd);
+ SET_MEMORY_W (t, n);
break;
case X (OP_POSTINC, SL): /* Register indirect w/post-incr, long. */
- t = GET_L_REG (rn) & h8_get_mask (sd);
- SET_MEMORY_L (t, n);
+ t = GET_L_REG (rn);
SET_L_REG (rn, t + 4);
+ t &= h8_get_mask (sd);
+ SET_MEMORY_L (t, n);
break;
case X (OP_DISP, SB): /* Register indirect w/displacement, byte. */
ind_arg_len = 0;
/* The size of the commandline argument. */
- ind_arg_len = strlen (h8_get_cmdline_arg (sd, i) + 1);
+ ind_arg_len = strlen (h8_get_cmdline_arg (sd, i)) + 1;
/* The total size of the command line string. */
size_cmdline += ind_arg_len;
}
int
-sim_write (SIM_DESC sd, SIM_ADDR addr, unsigned char *buffer, int size)
+sim_write (SIM_DESC sd, SIM_ADDR addr, const unsigned char *buffer, int size)
{
int i;
h8_set_ticks (sd, longval);
break;
}
- return -1;
+ return length;
}
int
}
void
-sim_do_command (SIM_DESC sd, char *cmd)
-{
- (*sim_callback->printf_filtered) (sim_callback,
- "This simulator does not accept any commands.\n");
-}
-
-void
sim_set_callbacks (struct host_callback_struct *ptr)
{
sim_callback = ptr;