-/*
- * This file is part of SIS.
- *
- * ERC32SIM, SPARC instruction simulator. Copyright (C) 1995 Jiri Gaisler,
- * European Space Agency
- *
- * This program is free software; you can redistribute it and/or modify it under
- * the terms of the GNU General Public License as published by the Free
- * Software Foundation; either version 2 of the License, or (at your option)
- * any later version.
- *
- * This program is distributed in the hope that it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
- * more details.
- *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc., 675
- * Mass Ave, Cambridge, MA 02139, USA.
- *
- */
-
-#include "end.h"
+/* Copyright (C) 1995-2019 Free Software Foundation, Inc.
+
+ This program is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3 of the License, or
+ (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program. If not, see <http://www.gnu.org/licenses/>. */
+
+#include "config.h"
+#include "ansidecl.h"
+#include "gdb/callback.h"
+#include "gdb/remote-sim.h"
+#include <sim-config.h>
+#include <stdint.h>
+
+#if HOST_BYTE_ORDER == BIG_ENDIAN
+#define HOST_BIG_ENDIAN
+#define EBT 0
+#else
+#define HOST_LITTLE_ENDIAN
+#define EBT 3
+#endif
#define I_ACC_EXC 1
typedef float float32; /* 32-bit float */
typedef double float64; /* 64-bit float */
+typedef uint64_t uint64; /* 64-bit unsigned int */
+typedef int64_t int64; /* 64-bit signed int */
+
struct pstate {
float64 fd[16]; /* FPU registers */
-#ifdef HOST_LITTLE_ENDIAN_FLOAT
+#ifdef HOST_LITTLE_ENDIAN
float32 fs[32];
float32 *fdp;
#else
uint32 g[8];
uint32 r[128];
uint32 y;
+ uint32 asr17; /* Single vector trapping */
uint32 pc, npc;
float32 freq; /* Simulated processor frequency */
- uint32 tottime;
- uint32 ninst;
- uint32 fholdt;
- uint32 holdt;
- uint32 icntt;
- uint32 finst;
- uint32 simstart;
- uint32 starttime;
- uint32 pwdtime; /* Cycles in power-down mode */
- uint32 nstore; /* Number of load instructions */
- uint32 nload; /* Number of store instructions */
- uint32 nannul; /* Number of annuled instructions */
- uint32 nbranch; /* Number of branch instructions */
+ double tottime;
+ uint64 ninst;
+ uint64 fholdt;
+ uint64 holdt;
+ uint64 icntt;
+ uint64 finst;
+ uint64 simstart;
+ double starttime;
+ uint64 tlimit; /* Simulation time limit */
+ uint64 pwdtime; /* Cycles in power-down mode */
+ uint64 nstore; /* Number of load instructions */
+ uint64 nload; /* Number of store instructions */
+ uint64 nannul; /* Number of annuled instructions */
+ uint64 nbranch; /* Number of branch instructions */
uint32 ildreg; /* Destination of last load instruction */
- uint32 ildtime; /* Last time point for load dependency */
+ uint64 ildtime; /* Last time point for load dependency */
int rett_err; /* IU in jmpl/restore error state (Rev.0) */
int jmpltime;
struct evcell {
void (*cfunc) ();
int32 arg;
- uint32 time;
+ uint64 time;
struct evcell *nxt;
};
struct estate {
struct evcell eq;
struct evcell *freeq;
- uint32 simtime;
+ uint64 simtime;
};
struct irqcell {
#define BPT_HIT 2
#define ERROR 3
#define CTRL_C 4
+
+/* Prototypes */
+
+/* erc32.c */
+extern void init_sim (void);
+extern void reset (void);
+extern void error_mode (uint32 pc);
+extern void sim_halt (void);
+extern void exit_sim (void);
+extern void init_stdio (void);
+extern void restore_stdio (void);
+extern int memory_iread (uint32 addr, uint32 *data, int32 *ws);
+extern int memory_read (int32 asi, uint32 addr, uint32 *data,
+ int32 sz, int32 *ws);
+extern int memory_write (int32 asi, uint32 addr, uint32 *data,
+ int32 sz, int32 *ws);
+extern int sis_memory_write (uint32 addr,
+ const unsigned char *data, uint32 length);
+extern int sis_memory_read (uint32 addr, char *data,
+ uint32 length);
+
+/* func.c */
+extern struct pstate sregs;
+extern void set_regi (struct pstate *sregs, int32 reg,
+ uint32 rval);
+extern void get_regi (struct pstate *sregs, int32 reg, char *buf);
+extern int exec_cmd (struct pstate *sregs, const char *cmd);
+extern void reset_stat (struct pstate *sregs);
+extern void show_stat (struct pstate *sregs);
+extern void init_bpt (struct pstate *sregs);
+extern void init_signals (void);
+
+struct disassemble_info;
+extern void dis_mem (uint32 addr, uint32 len,
+ struct disassemble_info *info);
+extern void event (void (*cfunc) (), int32 arg, uint64 delta);
+extern void set_int (int32 level, void (*callback) (), int32 arg);
+extern void advance_time (struct pstate *sregs);
+extern uint32 now (void);
+extern int wait_for_irq (void);
+extern int check_bpt (struct pstate *sregs);
+extern void reset_all (void);
+extern void sys_reset (void);
+extern void sys_halt (void);
+extern int bfd_load (const char *fname);
+extern double get_time (void);
+
+/* exec.c */
+extern int dispatch_instruction (struct pstate *sregs);
+extern int execute_trap (struct pstate *sregs);
+extern int check_interrupts (struct pstate *sregs);
+extern void init_regs (struct pstate *sregs);
+
+/* interf.c */
+extern int run_sim (struct pstate *sregs,
+ uint64 icount, int dis);
+
+/* float.c */
+extern int get_accex (void);
+extern void clear_accex (void);
+extern void set_fsr (uint32 fsr);
+
+/* help.c */
+extern void usage (void);
+extern void gen_help (void);
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