This commit was manufactured by cvs2svn to create branch

[external/binutils.git] / sim / common / sim-fpu.h

diff --git a/sim/common/sim-fpu.h b/sim/common/sim-fpu.h
index b48a04c..72323f5 100644 (file)
--- a/sim/common/sim-fpu.h
+++ b/sim/common/sim-fpu.h
@@ -1,5 +1,5 @@
 /* Simulator Floating-point support.
-   Copyright (C) 1997 Free Software Foundation, Inc.
+   Copyright (C) 1997, 1998, 2002 Free Software Foundation, Inc.
    Contributed by Cygnus Support.
 
 This file is part of GDB, the GNU debugger.
@@ -42,7 +42,7 @@ with this program; if not, write to the Free Software Foundation, Inc.,
 
    For unpacked structures (passed by value and reference), the code
    quality of GCC-2.7 (on x86) for each alternative was compared.
-   Needless to say the results, while better then for a packed 64 bit
+   Needless to say the results, while better than for a packed 64 bit
    object, were still poor (GCC had only limited support for the
    optimization of references to structure members).  Regardless, the
    struct-by-ref alternative achieved better results when compiled
@@ -164,9 +164,9 @@ typedef enum
    When converting from the sim_fpu internal type to 32/64 bit packed
    format, the operation may result in a loss of precision. The
    configuration macro WITH_FPU_CONVERSION controls this.  By default,
-   silent round to nearest is performed.  Alternativly, round up,
+   silent round to nearest is performed.  Alternatively, round up,
    round down and round to zero can be performed.  In a simulator
-   emulating exact FPU behavour, sim_fpu_round_{32,64} should be
+   emulating exact FPU behavior, sim_fpu_round_{32,64} should be
    called before packing the sim_fpu value.  */
 
 INLINE_SIM_FPU (void) sim_fpu_32to (sim_fpu *f, unsigned32 s);
@@ -178,6 +178,23 @@ INLINE_SIM_FPU (void) sim_fpu_to232 (unsigned32 *h, unsigned32 *l, const sim_fpu
 INLINE_SIM_FPU (void) sim_fpu_to64 (unsigned64 *d, const sim_fpu *f);
 
 
+/* Create a sim_fpu struct using raw information.  (FRACTION & LSMASK
+   (PRECISION-1, 0)) is assumed to contain the fraction part of the
+   floating-point number.  The leading bit LSBIT (PRECISION) is always
+   implied.  The number created can be represented by:
+
+   (SIGN ? "-" : "+") "1." FRACTION{PRECISION-1,0} X 2 ^ NORMAL_EXP>
+
+   You can not specify zero using this function. */
+
+INLINE_SIM_FPU (void) sim_fpu_fractionto (sim_fpu *f, int sign, int normal_exp, unsigned64 fraction, int precision);
+
+/* Reverse operation.  If S is a non-zero number, discards the implied
+   leading one and returns PRECISION fraction bits.  No rounding is
+   performed. */
+INLINE_SIM_FPU (unsigned64) sim_fpu_tofraction (const sim_fpu *s, int precision);
+
+
 
 /* Rounding operators.
 
@@ -193,7 +210,7 @@ INLINE_SIM_FPU (int) sim_fpu_round_64 (sim_fpu *f,
 
 
 
-/* Arrithmetic operators.
+/* Arithmetic operators.
 
    FIXME: In the future, additional arguments ROUNDING and BITSIZE may
    be added. */
@@ -266,7 +283,7 @@ INLINE_SIM_FPU (int) sim_fpu_to232u (unsigned64 *h, unsigned64 *l, const sim_fpu
 
 /* Conversion of internal sim_fpu type to host double format.
 
-   For debuging/tracing only.  A SNaN is never returned. */
+   For debugging/tracing only.  A SNaN is never returned. */
 
 /* INLINE_SIM_FPU (float) sim_fpu_2f (const sim_fpu *f); */
 INLINE_SIM_FPU (double) sim_fpu_2d (const sim_fpu *d);
@@ -304,7 +321,7 @@ INLINE_SIM_FPU (int) sim_fpu_exp (const sim_fpu *s);
 
 /* Specific comparison operators
 
-   For NaNs et.al., the comparison operators will set IS to zero and
+   For NaNs et al., the comparison operators will set IS to zero and
    return a nonzero result. */
 
 INLINE_SIM_FPU (int) sim_fpu_lt (int *is, const sim_fpu *l, const sim_fpu *r);
@@ -337,7 +354,7 @@ INLINE_SIM_FPU (int) sim_fpu_is_gt (const sim_fpu *l, const sim_fpu *r);
 #ifndef SIM_FPU_IS_SNAN
 enum {
   SIM_FPU_IS_SNAN = 1, /* Noisy not-a-number */
-  SIM_FPU_IS_QNAN = 2, /* Quite not-a-number */
+  SIM_FPU_IS_QNAN = 2, /* Quiet not-a-number */
   SIM_FPU_IS_NINF = 3, /* -infinity */
   SIM_FPU_IS_PINF = 4, /* +infinity */
   SIM_FPU_IS_NNUMBER = 5, /* -number - [ -MAX .. -MIN ] */
@@ -354,14 +371,14 @@ INLINE_SIM_FPU (int) sim_fpu_cmp (const sim_fpu *l, const sim_fpu *r);
 
 
 
-/* A constant of useful numbers */
+/* A number of useful constants.  */
 
-EXTERN_SIM_FPU (const sim_fpu) sim_fpu_zero;
-EXTERN_SIM_FPU (const sim_fpu) sim_fpu_one;
-EXTERN_SIM_FPU (const sim_fpu) sim_fpu_two;
-EXTERN_SIM_FPU (const sim_fpu) sim_fpu_qnan;
-EXTERN_SIM_FPU (const sim_fpu) sim_fpu_max32;
-EXTERN_SIM_FPU (const sim_fpu) sim_fpu_max64;
+extern const sim_fpu sim_fpu_zero;
+extern const sim_fpu sim_fpu_one;
+extern const sim_fpu sim_fpu_two;
+extern const sim_fpu sim_fpu_qnan;
+extern const sim_fpu sim_fpu_max32;
+extern const sim_fpu sim_fpu_max64;
 
 
 /* Select the applicable functions for the fp_word type */
@@ -385,10 +402,17 @@ EXTERN_SIM_FPU (const sim_fpu) sim_fpu_max64;
 
 typedef void sim_fpu_print_func (void *, char *, ...);
 
+/* Print a sim_fpu with full precision.  */
 INLINE_SIM_FPU (void) sim_fpu_print_fpu (const sim_fpu *f,
                                         sim_fpu_print_func *print,
                                         void *arg);
 
+/* Print a sim_fpu with `n' trailing digits.  */
+INLINE_SIM_FPU (void) sim_fpu_printn_fpu (const sim_fpu *f,
+                                         sim_fpu_print_func *print,
+                                         int digits,
+                                         void *arg);
+
 INLINE_SIM_FPU (void) sim_fpu_print_status (int status,
                                            sim_fpu_print_func *print,
                                            void *arg);