of the floating point routines in libgcc1.c for targets without
hardware floating point. */
-/* Copyright 1994, 1997, 1998, 2003, 2007 Free Software Foundation, Inc.
+/* Copyright 1994-2016 Free Software Foundation, Inc.
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
#include "sim-assert.h"
-/* Debugging support.
+/* Debugging support.
If digits is -1, then print all digits. */
static void
print (arg, "0");
bit >>= 1;
- if (digits > 0) digits--;
+ if (digits > 0)
+ digits--;
i = (i + 1) % 4;
}
}
/* Quick and dirty conversion between a host double and host 64bit int */
-typedef union {
+typedef union
+{
double d;
unsigned64 i;
-} sim_fpu_map;
+} sim_fpu_map;
/* A packed IEEE floating point number.
Zero (0 == BIASEDEXP && FRAC == 0):
(sign ? "-" : "+") 0.0
-
+
Infinity (BIASEDEXP == EXPMAX && FRAC == 0):
(sign ? "-" : "+") "infinity"
/* Infinity */
sign = src->sign;
exp = EXPMAX;
- fraction = 0;
+ fraction = 0;
}
else
{
(long) LSEXTRACTED32 (packed, 23 - 1, 0));
}
#endif
-
+
return packed;
}
f->sign = (i < 0);
f->normal_exp = NR_FRAC_GUARD;
- if (f->sign)
+ if (f->sign)
{
/* Special case for minint, since there is no corresponding
+ve integer representation for it */
if (f->fraction >= IMPLICIT_2)
{
- do
+ do
{
f->fraction = (f->fraction >> 1) | (f->fraction & 1);
f->normal_exp += 1;
return 0;
break;
case sim_fpu_class_snan:
- /* Quieten a SignalingNaN */
+ /* Quieten a SignalingNaN */
f->class = sim_fpu_class_qnan;
return sim_fpu_status_invalid_snan;
break;
/* sign? */
f->class = sim_fpu_class_number;
- if ((signed64) f->fraction >= 0)
+ if (((signed64) f->fraction) >= 0)
f->sign = 0;
else
{
/* sign? */
f->class = sim_fpu_class_number;
- if ((signed64) f->fraction >= 0)
+ if (((signed64) f->fraction) >= 0)
f->sign = 0;
else
{
res2 += ((ps_hh__ >> 32) & 0xffffffff) + pp_hh;
high = res2;
low = res0;
-
+
f->normal_exp = l->normal_exp + r->normal_exp;
f->sign = l->sign ^ r->sign;
f->class = sim_fpu_class_number;
/* Input is bounded by [1,2) ; [2^60,2^61)
Output is bounded by [1,4) ; [2^120,2^122) */
-
+
/* Adjust the exponent according to where the decimal point ended
up in the high 64 bit word. In the source the decimal point
was at NR_FRAC_GUARD. */
f->normal_exp--;
}
ASSERT (numerator >= denominator);
-
+
/* Gain extra precision, already used one spare bit */
numerator <<= NR_SPARE;
denominator <<= NR_SPARE;
}
ASSERT (l->sign == r->sign);
if (l->normal_exp > r->normal_exp
- || (l->normal_exp == r->normal_exp &&
+ || (l->normal_exp == r->normal_exp &&
l->fraction > r->fraction))
{
/* |l| > |r| */
}
ASSERT (l->sign == r->sign);
if (l->normal_exp > r->normal_exp
- || (l->normal_exp == r->normal_exp &&
+ || (l->normal_exp == r->normal_exp &&
l->fraction > r->fraction))
{
/* |l| > |r| */
*
* Developed at SunPro, a Sun Microsystems, Inc. business.
* Permission to use, copy, modify, and distribute this
- * software is freely granted, provided that this notice
+ * software is freely granted, provided that this notice
* is preserved.
* ====================================================
*/
-
+
/* __ieee754_sqrt(x)
* Return correctly rounded sqrt.
* ------------------------------------------
* | Use the hardware sqrt if you have one |
* ------------------------------------------
- * Method:
- * Bit by bit method using integer arithmetic. (Slow, but portable)
+ * Method:
+ * Bit by bit method using integer arithmetic. (Slow, but portable)
* 1. Normalization
- * Scale x to y in [1,4) with even powers of 2:
+ * Scale x to y in [1,4) with even powers of 2:
* find an integer k such that 1 <= (y=x*2^(2k)) < 4, then
* sqrt(x) = 2^k * sqrt(y)
-
* i+1 2
* s = 2*q , and y = 2 * ( y - q ). (1)
* i i i i
- *
- * To compute q from q , one checks whether
- * i+1 i
+ *
+ * To compute q from q , one checks whether
+ * i+1 i
*
* -(i+1) 2
* (q + 2 ) <= y. (2)
* i+1 i i+1 i
*
* With some algebric manipulation, it is not difficult to see
- * that (2) is equivalent to
+ * that (2) is equivalent to
* -(i+1)
* s + 2 <= y (3)
* i i
*
- * The advantage of (3) is that s and y can be computed by
+ * The advantage of (3) is that s and y can be computed by
* i i
* the following recurrence formula:
* if (3) is false
* -i -(i+1)
* s = s + 2 , y = y - s - 2 (5)
* i+1 i i+1 i i
- *
+ *
-
- -(i+1)
- - NOTE: y = 2 (y - s - 2 )
+ - NOTE: y = 2 (y - s - 2 )
- i+1 i i
-
- * One may easily use induction to prove (4) and (5).
+ * One may easily use induction to prove (4) and (5).
* Note. Since the left hand side of (3) contain only i+2 bits,
- * it does not necessary to do a full (53-bit) comparison
+ * it does not necessary to do a full (53-bit) comparison
* in (3).
* 3. Final rounding
* After generating the 53 bits result, we compute one more bit.
* The rounding mode can be detected by checking whether
* huge + tiny is equal to huge, and whether huge - tiny is
* equal to huge for some floating point number "huge" and "tiny".
- *
+ *
* Special cases:
* sqrt(+-0) = +-0 ... exact
* sqrt(inf) = inf
b = IMPLICIT_1;
q = 0;
s = 0;
-
+
while (b)
{
unsigned64 t = s + b;
#if EXTERN_SIM_FPU_P
const sim_fpu sim_fpu_zero = {
- sim_fpu_class_zero,
+ sim_fpu_class_zero, 0, 0, 0
};
const sim_fpu sim_fpu_qnan = {
- sim_fpu_class_qnan,
+ sim_fpu_class_qnan, 0, 0, 0
};
const sim_fpu sim_fpu_one = {
sim_fpu_class_number, 0, IMPLICIT_1, 0
void *arg)
{
int i = 1;
- char *prefix = "";
+ const char *prefix = "";
while (status >= i)
{
switch ((sim_fpu_status) (status & i))
case sim_fpu_status_invalid_sqrt:
print (arg, "%sSQRT", prefix);
break;
- break;
case sim_fpu_status_inexact:
print (arg, "%sX", prefix);
break;
- break;
case sim_fpu_status_overflow:
print (arg, "%sO", prefix);
break;
- break;
case sim_fpu_status_underflow:
print (arg, "%sU", prefix);
break;
- break;
case sim_fpu_status_invalid_div0:
print (arg, "%s/", prefix);
break;
- break;
case sim_fpu_status_rounded:
print (arg, "%sR", prefix);
break;
- break;
}
i <<= 1;
prefix = ",";