/* Blackfin Phase Lock Loop (PLL) model.
- Copyright (C) 2010-2011 Free Software Foundation, Inc.
+ Copyright (C) 2010-2014 Free Software Foundation, Inc.
Contributed by Analog Devices, Inc.
This file is part of simulators.
pll->pll_lockcnt = 0x300;
}
-const struct hw_descriptor dv_bfin_pll_descriptor[] = {
+const struct hw_descriptor dv_bfin_pll_descriptor[] =
+{
{"bfin_pll", bfin_pll_finish,},
{NULL, NULL},
};