/* iwmmxt.c -- Intel(r) Wireless MMX(tm) technology co-processor interface.
- Copyright (C) 2002 Free Software Foundation, Inc.
+ Copyright (C) 2002, 2007, 2008, 2009, 2010 Free Software Foundation, Inc.
Contributed by matthew green (mrg@redhat.com).
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
+ the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
-
+
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
-
+
You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+ along with this program. If not, see <http://www.gnu.org/licenses/>. */
+
+#include <string.h>
#include "armdefs.h"
#include "armos.h"
s = (signed long) a * (signed long) b;
- (signed long long) t += s;
+ t = t + (ARMdword) s;
}
else
{
wR [BITS (12, 15)] = 0;
if (BIT (21)) /* Signed. */
- (signed long long) wR[BITS (12, 15)] += (signed long long) t;
+ wR[BITS (12, 15)] += t;
else
wR [BITS (12, 15)] += t;
b = wRHALF (BITS (0, 3), i * 2);
b = EXTEND16 (b);
- (signed long) s1 = a * b;
+ s1 = (ARMdword) (a * b);
a = wRHALF (BITS (16, 19), i * 2 + 1);
a = EXTEND16 (a);
b = wRHALF (BITS (0, 3), i * 2 + 1);
b = EXTEND16 (b);
- (signed long) s2 = a * b;
+ s2 = (ARMdword) (a * b);
}
else /* Unsigned. */
{
a = wRHALF (BITS (16, 19), i * 2);
b = wRHALF (BITS ( 0, 3), i * 2);
- (unsigned long) s1 = a * b;
+ s1 = (ARMdword) (a * b);
a = wRHALF (BITS (16, 19), i * 2 + 1);
b = wRHALF (BITS ( 0, 3), i * 2 + 1);
- (signed long) s2 = a * b;
+ s2 = (ARMdword) a * b;
}
r |= (ARMdword) ((s1 + s2) & 0xffffffff) << (i ? 32 : 0);
if (shift > 63)
r = 0;
else
- r = ((wR[BITS (16, 19)] & 0xffffffffffffffff) << shift);
+ r = ((wR[BITS (16, 19)] & 0xffffffffffffffffULL) << shift);
SIMD64_SET (psr, NBIT64 (r), SIMD_NBIT);
SIMD64_SET (psr, ZBIT64 (r), SIMD_ZBIT);
case Dqual:
if (shift > 63)
- r = (wR [BITS (16, 19)] & 0x8000000000000000) ? 0xffffffffffffffff : 0;
+ r = (wR [BITS (16, 19)] & 0x8000000000000000ULL) ? 0xffffffffffffffffULL : 0;
else
- r = ((signed long long) (wR[BITS (16, 19)] & 0xffffffffffffffff) >> shift);
+ r = ((signed long long) (wR[BITS (16, 19)] & 0xffffffffffffffffULL) >> shift);
SIMD64_SET (psr, NBIT64 (r), SIMD_NBIT);
SIMD64_SET (psr, ZBIT64 (r), SIMD_ZBIT);
break;
if (shift > 63)
r = 0;
else
- r = (wR [BITS (16, 19)] & 0xffffffffffffffff) >> shift;
+ r = (wR [BITS (16, 19)] & 0xffffffffffffffffULL) >> shift;
SIMD64_SET (psr, NBIT64 (r), SIMD_NBIT);
SIMD64_SET (psr, ZBIT64 (r), SIMD_ZBIT);
r = wRWORD (BITS (16, 19), 1);
if (BIT (21) && NBIT32 (r))
- r |= 0xffffffff00000000;
+ r |= 0xffffffff00000000ULL;
SIMD64_SET (psr, NBIT64 (r), SIMD_NBIT);
SIMD64_SET (psr, ZBIT64 (r), SIMD_ZBIT);
r = wRWORD (BITS (16, 19), 0);
if (BIT (21) && NBIT32 (r))
- r |= 0xffffffff00000000;
+ r |= 0xffffffff00000000ULL;
SIMD64_SET (psr, NBIT64 (r), SIMD_NBIT);
SIMD64_SET (psr, ZBIT64 (r), SIMD_ZBIT);