+2003-01-10 Ben Elliston <bje@redhat.com>
+
+ * README.Cygnus: Rename from this ..
+ * README: .. to this.
+
+2002-09-27 Andrew Cagney <ac131313@redhat.com>
+
+ * wrapper.c (sim_open): Add support for -m<mem-size>.
+ (mem_size): Reduce to 2MB.
+ Fix PR gdb/433.
+
+2002-08-15 Nick Clifton <nickc@redhat.com>
+
+ * armos.c (ARMul_OSHandleSWI): Catch and ignore SWIs of -1, they
+ can be caused by an interrupted system call being resumed by GDB.
+
+2002-07-05 Nick Clifton <nickc@cambridge.redhat.com>
+
+ * armemu.c (ARMul_Emulate32): Add more tests for valid MIA, MIAPH
+ and MIAxy instructions.
+
+2002-06-21 Nick Clifton <nickc@cambridge.redhat.com>
+
+ * armos.h (ADP_Stopped_RunTimeError): Set correct value.
+
+2002-06-16 Andrew Cagney <ac131313@redhat.com>
+
+ * configure: Regenerated to track ../common/aclocal.m4 changes.
+
+2002-06-12 Andrew Cagney <ac131313@redhat.com>
+
+ * Makefile.in: Update copyright.
+ (wrapper.o): Specify dependencies.
+ * wrapper.c: Include "gdb/sim-arm.h".
+ (sim_store_register, sim_fetch_register): Rewrite using `enum
+ arm_sim_regs' and a switch.
+
+2002-06-09 Andrew Cagney <cagney@redhat.com>
+
+ * wrapper.c: Include "gdb/callback.h" and "gdb/remote-sim.h".
+ * armos.c: Include "gdb/callback.h".
+
+2002-05-29 Nick Clifton <nickc@cambridge.redhat.com>
+
+ * armcopro.c (XScale_check_memacc): Set the FSR and FAR registers
+ if a Data Abort is detected.
+
+2002-05-27 Nick Clifton <nickc@cambridge.redhat.com>
+
+ * armvirt.c (GetWord): Only perform access checks if 'check'
+ is set.
+ (PutWord): Likewise.
+ * wrapper.c (sim_create_inferior): Report unknown machine
+ numbers.
+ * thumbemu.c (ARMul_ThumbDecode, Case 31): Do not set LR to pc +
+ 2, it has already been advanced.
+
+2002-05-23 Nick Clifton <nickc@cambridge.redhat.com>
+
+ * thumbemu.c (ARMul_ThumbDecode): When decoding a BLX(1)
+ instruction do not add in the second bit of the base address -
+ this has already been accounted for.
+
+2002-05-21 Nick Clifton <nickc@cambridge.redhat.com>
+
+ * armcopro.c (check_cp13_access): Allow access to register 1 when
+ CRm is 1.
+ (write_cp13_reg): Allow bit 0 of reg 1 of CRm 1 to be written to.
+
+2002-05-17 Nick Clifton <nickc@cambridge.redhat.com>
+
+ * Makefile.in (SIM_TARGET_SWITCHES): Define.
+ * armos.c (swi_mask): Define. Initialise to supporting all
+ SWI emulations.
+ (ARMul_OSInit): For XScale targets, only support the ANGEL
+ SWI interface. (This is at the request if Intel).
+ (ARMul_OSHandleSWI): Examine swi_mask to see if a particular
+ SWI call should be emulated.
+ Do not fall through from AngelSWI_Reason_WriteC.
+ Propagate exit code from RedBoot Exit SWI.
+ * rdi-dgb.h (swi_mask): Prototype.
+ (SWI_MASK_DEMON, SWI_MASK_ANGEL, SWI_MASK_REDBOOT): Define.
+ * wrapper.c (sim_target_parse_command_line): New function.
+ Look for and handle --swi-support switch.
+ (sim_target_parse_arg_array): New function. Process an argv
+ array for parsing by sim_target_parse_command_line.
+ (sim_target_display_usage): New function. Describe syntax of
+ --swi-suppoort switch.
+ (sim_open): Add call to sim_target_parse_arg_array).
+
+2002-05-09 Nick Clifton <nickc@cambridge.redhat.com>
+
+ * armos.c (ARMul_OSHandleSWI): Support the RedBoot SWI in ARM
+ mode and some of its system calls.
+
+2002-03-17 Anthony Green <green@redhat.com>
+
+ * wrapper.c (mem_size): Increase the default target memory to 8MB.
+
+2002-02-21 Keith Seitz <keiths@redhat.com>
+
+ * armos.c (SWIWrite0): Use generic host_callback mechanism
+ for supported OS functions "open", "close", "write", etc.
+ (SWIopen): Likewise.
+ (SWIread): Likewise.
+ (SWIwrite): Likewise.
+ (SWIflen): Likewise.
+ (ARMul_OSHandleSWI): Likewise.
+
+2002-02-05 Nick Clifton <nickc@cambridge.redhat.com>
+
+ * wrapper.c (sim_create_inferior): Modify previous patch so that
+ it is only triggered for COFF format executables.
+
+2002-02-04 Nick Clifton <nickc@cambridge.redhat.com>
+
+ * wrapper.c (sin_create_inferior): If a v5 architecture is
+ detected, assume it might be an XScale binary, since there is no
+ way to distinguish between the two in the COFF file format.
+
+2002-01-10 Nick Clifton <nickc@cambridge.redhat.com>
+
+ * arminit.c (ARMul_Abort): Fix parameters passed to CPRead[13].
+ * armemu.c (ARMul_Emulate32): Fix parameters passed to CPRead[13]
+ and CPRead[14].
+ Fix formatting. Improve layout.
+ * armemu.h: Fix formatting. Improve layout.
+
+2002-01-09 Nick Clifton <nickc@cambridge.redhat.com>
+
+ * wrapper.c (sim_fetch_register): If fetching more than 4 bytes
+ return zeroes in the other words.
+ General formatting tidy ups.
+
+2001-11-16 Ben Harris <bjh21@netbsd.org>
+
+ * Makefile.in (armemu32.o): Replace $< with autoconf recommended
+ $(srcdir)/....
+ (armemu26.o): Ditto.
+
+2001-10-18 Nick Clifton <nickc@cambridge.redhat.com>
+
+ * armemu.h (CP_ACCESS_ALLOWED): New macro.
+ Fix formatting.
+ * armcopro.c (read_cp14_reg): Make static.
+ (write_cp14_reg): Make static.
+ (check_cp13_access): Use CP_ACCESS_ALLOWED macro.
+ Fix formatting.
+ * armsupp.c (ARMul_LDC): Check CP_ACCESS_ALLOWED.
+ (ARMul_STC): Check CP_ACCESS_ALLOWED.
+ (ARMul_MCR): Check CP_ACCESS_ALLOWED.
+ (ARMul_MRC): Check CP_ACCESS_ALLOWED.
+ (ARMul_CDP): Check CP_ACCESS_ALLOWED.
+ Fix formatting.
+ * armemu.c (MCRR): Check CP_ACCESS_ALLOWED. Test Rd and Rn not
+ equal to 15.
+ (MRRC): Check CP_ACCESS_ALLOWED. Test Rd and Rn not equal to 15.
+ Fix formatting.
+
+2001-05-11 Nick Clifton <nickc@cambridge.redhat.com>
+
+ * armemu.c (ARMul_Emulate32): Fix handling of XScale LDRD and STRD
+ instructions with post indexed addressing modes.
+
+2001-05-08 Jens-Christian Lache <lache@tu-harburg.de>
+
+ * armsupp.c (ARMul_FixCPSR): Check Mode not Bank in order to
+ determine rocesor mode.
+
+2001-04-18 matthew green <mrg@redhat.com>
+
+ * armcopro.c (write_cp15_reg): Set CHANGEMODE if endianness changes.
+ (read_cp15_reg): Make non-static.
+ (XScale_cp15_LDC): Update for write_cp15_reg() change.
+ (XScale_cp15_MCR): Likewise.
+ (XScale_cp15_write_reg): Likewise.
+ (XScale_check_memacc): New function. Check for breakpoints being
+ activated by memory accesses. Does not support the Branch Target
+ Buffer.
+ (XScale_set_fsr_far): New function. Set FSR and FAR for XScale.
+ (XScale_debug_moe): New function. Set the debug Method Of Entry,
+ if configured.
+ (write_cp14_reg): Reset count counter if requested.
+ * armdefs.h (struct ARMul_State): New members `LastTime' and
+ `CP14R0_CCD' used for the timer/counters.
+ (ARMul_CP13_R0_FIQ, ARMul_CP13_R0_IRQ, ARMul_CP13_R8_PMUS,
+ ARMul_CP14_R0_ENABLE, ARMul_CP14_R0_CLKRST, ARMul_CP14_R0_CCD,
+ ARMul_CP14_R0_INTEN0, ARMul_CP14_R0_INTEN1, ARMul_CP14_R0_INTEN2,
+ ARMul_CP14_R0_FLAG0, ARMul_CP14_R0_FLAG1, ARMul_CP14_R0_FLAG2,
+ ARMul_CP14_R10_MOE_IB, ARMul_CP14_R10_MOE_DB, ARMul_CP14_R10_MOE_BT,
+ ARMul_CP15_R1_ENDIAN, ARMul_CP15_R1_ALIGN, ARMul_CP15_R5_X,
+ ARMul_CP15_R5_ST_ALIGN, ARMul_CP15_R5_IMPRE, ARMul_CP15_R5_MMU_EXCPT,
+ ARMul_CP15_DBCON_M, ARMul_CP15_DBCON_E1, ARMul_CP15_DBCON_E0): New
+ defines for XScale registers.
+ (XScale_check_memacc, XScale_set_fsr_far, XScale_debug_moe): Prototype.
+ (ARMul_Emulate32, ARMul_Emulate26): Clean up function definition.
+ (ARMul_Emulate32): Handle the clock counter and hardware instruction
+ breakpoints. Call XScale_set_fsr_far() for software breakpoints and
+ software interrupts.
+ (LoadMult): Call XScale_set_fsr_far() for data aborts.
+ (LoadSMult): Likewise.
+ (StoreMult): Likewise.
+ (StoreSMult): Likewise.
+ * armemu.h (write_cp15_reg): Update prototype.
+ * arminit.c (ARMul_NewState): Initialise CP14R0_CCD and LastTime.
+ (ARMul_Abort): If XScale, check for FIQ and IRQ being enabled in CP13
+ register 0.
+ * armvirt.c (GetWord): Call XScale_check_memacc().
+ (PutWord): Likewise.
+
+2001-03-20 Nick Clifton <nickc@redhat.com>
+
+ * armvirt.c (ARMul_ReLoadInstr): Do not enable alignment checking
+ when loading unaligned thumb instructions.
+
+2001-03-06 Nick Clifton <nickc@redhat.com>
+
+ * thumbemu.c (ARMul_ThumbDecode): Delete label bo_blx2.
+ Compute destination address of BLX(1) instruction by
+ taking bit 1 from PC and not from bit 0 of the offset.
+
+2001-02-27 Nick Clifton <nickc@redhat.com>
+
+ * armvirt.c (GetWord): Add new parameter - check - to enable or
+ disable the alignment checking.
+ (PutWord): Add new parameter - check - to enable or disable the
+ alignment checking.
+ (ARMul_ReLoadInstr): Pass extra parameter to GetWord.
+ (ARMul_ReadWord): Pass extra parameter to GetWord.
+ (ARMul_WriteWord): Pass extra parameter to PutWord.
+ (ARMul_StoreHalfWord): Pass extra parameter to PutWord.
+ (ARMul_WriteByte): Pass extra parameter to GetWord.
+ (ARMul_SwapWord): Pass extra parameter to PutWord.
+ (ARMul_SafeReadByte): New Function: Read a byte but do not abort.
+ (ARMul_SafeWriteByte): New Function: Write a byte but do not abort.
+
+ * armdefs.h: Add prototypes for ARMul_SafeReadByte and
+ ARMul_SafeWriteByte.
+
+ * wrapper.c (sim_write): Use ARMul_SafeWriteByte.
+ (sim_read): Use ARMul_SafeReadByte.
+
+ * armos.c (in_SWI_handler): Remove.
+ (SWIWrite0): Use ARMul_SafeReadByte.
+ (WriteCommandLineTo): Use ARMul_SafeWriteByte.
+ (SWIopen): Use ARMul_SafeReadByte.
+ (SWIread): Use ARMul_SafeWriteByte.
+ (SWIwrite): Use ARMul_SafeReadByte.
+ (ARMul_OSHandleSWI): Remove use of is_SWI_handler.
+ (ARMul_OSException): Remove use of is_SWI_handler.
+
+2001-02-16 Nick Clifton <nickc@redhat.com>
+
+ * armemu.c: Remove Prefetch abort for breakpoints. Instead set
+ the state to RESUME.
+
+2001-02-14 Nick Clifton <nickc@redhat.com>
+
+ * armemu.c: Add code to preserve processor mode when a prefetch
+ abort is signalled after processing a breakpoint.
+
+ * wrapper.c (sim_create_inferior): Reset processor into ARM mode
+ for any machine type except the early ARMs.
+
2001-02-13 Nick Clifton <nickc@redhat.com>
* armos.c (in_SWI_handler): New static variable.
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