CONFIG_ACX544AKN
CONFIG_ADDRESS
CONFIG_ADDR_AUTO_INCR_BIT
-CONFIG_ADDR_MAP
CONFIG_ADNPESC1
CONFIG_AEABI
CONFIG_AEMIF_CNTRL_BASE
CONFIG_ARCH_ADPAG101P
CONFIG_ARCH_HAS_ILOG2_U32
CONFIG_ARCH_HAS_ILOG2_U64
-CONFIG_ARCH_KIRKWOOD
CONFIG_ARCH_MAP_SYSMEM
CONFIG_ARCH_OMAP4
-CONFIG_ARCH_ORION5X
CONFIG_ARCH_RMOBILE_EXTRAM_BOOT
-CONFIG_ARCH_TEGRA
CONFIG_ARCH_USE_BUILTIN_BSWAP
CONFIG_ARC_MMU_VER
CONFIG_ARMADA100
CONFIG_ARMADA100_FEC
CONFIG_ARMADA168
CONFIG_ARMADA_39X
-CONFIG_ARMV7_PSCI_1_0
CONFIG_ARMV7_SECURE_BASE
CONFIG_ARMV7_SECURE_MAX_SIZE
CONFIG_ARMV7_SECURE_RESERVE_SIZE
CONFIG_ARMV8_SWITCH_TO_EL1
CONFIG_ARM_ARCH_CP15_ERRATA
-CONFIG_ARM_DCC
CONFIG_ARM_FREQ
CONFIG_ARM_GIC_BASE_ADDRESS
CONFIG_ARM_PL180_MMCI_BASE
CONFIG_AT91_LED
CONFIG_AT91_WANTS_COMMON_PHY
CONFIG_ATAPI
-CONFIG_ATI
CONFIG_ATI_RADEON_FB
CONFIG_ATM
CONFIG_ATMEL_LCD
CONFIG_BOOTP_
CONFIG_BOOTP_BOOTFILE
CONFIG_BOOTP_BOOTFILESIZE
-CONFIG_BOOTP_DEFAULT
CONFIG_BOOTP_DHCP_REQUEST_DELAY
CONFIG_BOOTP_ID_CACHE_SIZE
CONFIG_BOOTP_MAY_FAIL
CONFIG_BOOTP_NISDOMAIN
CONFIG_BOOTP_RANDOM_DELAY
-CONFIG_BOOTP_SEND_HOSTNAME
CONFIG_BOOTP_SERVERIP
CONFIG_BOOTP_TIMEOFFSET
CONFIG_BOOTP_VENDOREX
CONFIG_CLK_800_330_165
CONFIG_CLK_DEBUG
CONFIG_CLOCKS
-CONFIG_CLOCKS_IN_MHZ
CONFIG_CLOCK_SYNTHESIZER
CONFIG_CM922T_XA10
CONFIG_CMDLINE_PS_SUPPORT
CONFIG_CM_T335
CONFIG_CM_T3X
CONFIG_CM_T43
-CONFIG_CM_T54
CONFIG_CM_TCRAM
CONFIG_CNTL
CONFIG_COLDFIRE
CONFIG_CPLD_OR_PRELIM
CONFIG_CPM2
CONFIG_CPU_ARMV8
-CONFIG_CPU_CAVIUM_OCTEON
CONFIG_CPU_FREQ_HZ
CONFIG_CPU_HAS_LLSC
CONFIG_CPU_HAS_PREFETCH
CONFIG_CPU_PXA26X
CONFIG_CPU_PXA27X
CONFIG_CPU_PXA300
-CONFIG_CPU_R8000
CONFIG_CPU_SH7722
CONFIG_CPU_SH7751
CONFIG_CPU_SH7752
CONFIG_DEFAULT
CONFIG_DEFAULT_CONSOLE
CONFIG_DEFAULT_IMMR
-CONFIG_DEF_HWCONFIG
-CONFIG_DELAY_ENVIRONMENT
CONFIG_DESIGNWARE_ETH
CONFIG_DEVELOP
CONFIG_DEVICE_TREE_LIST
CONFIG_DHCP_MIN_EXT_LEN
CONFIG_DIALOG_POWER
CONFIG_DIMM_SLOTS_PER_CTLR
-CONFIG_DIRECT_NOR_BOOT
CONFIG_DISCONTIGMEM
CONFIG_DISCOVER_PHY
CONFIG_DISPLAY_AER_xxxx
CONFIG_DP_DDR_CTRL
CONFIG_DP_DDR_DIMM_SLOTS_PER_CTLR
CONFIG_DP_DDR_NUM_CTRLS
-CONFIG_DRAM_2G
CONFIG_DRAM_TIMINGS_
CONFIG_DRIVER_AT91EMAC
CONFIG_DRIVER_AT91EMAC_PHYADDR
CONFIG_DRIVER_EP93XX_MAC
CONFIG_DRIVER_NE2000
CONFIG_DRIVER_NE2000_BASE
-CONFIG_DRIVER_TI_EMAC_USE_RMII
CONFIG_DSP_CLUSTER_START
-CONFIG_DUOVERO
CONFIG_DWC2_DFLT_SPEED_FULL
CONFIG_DWC2_DMA_BURST_SIZE
CONFIG_DWC2_DMA_ENABLE
CONFIG_EDB93XX_SDCS1
CONFIG_EDB93XX_SDCS2
CONFIG_EDB93XX_SDCS3
-CONFIG_EEPRO100
-CONFIG_EEPRO100_SROM_WRITE
CONFIG_EFLASH_PROTSECTORS
CONFIG_EHCI_DESC_BIG_ENDIAN
CONFIG_EHCI_HCD_INIT_AFTER_RESET
CONFIG_EHCI_MMIO_BIG_ENDIAN
CONFIG_EHCI_MXS_PORT0
CONFIG_EHCI_MXS_PORT1
-CONFIG_ELBC_NAND_SPL_STATIC_PGSIZE
CONFIG_EMU
CONFIG_ENABLE_36BIT_PHYS
CONFIG_ENABLE_MMU
CONFIG_ENABLE_MUST_CHECK
-CONFIG_ENABLE_WARN_DEPRECATED
-CONFIG_ENV_ACCESS_IGNORE_FORCE
CONFIG_ENV_ADDR_FLEX
CONFIG_ENV_CALLBACK_LIST_DEFAULT
CONFIG_ENV_CALLBACK_LIST_STATIC
CONFIG_ENV_MAX_ENTRIES
CONFIG_ENV_MIN_ENTRIES
CONFIG_ENV_OFFSET_OOB
-CONFIG_ENV_OVERWRITE
CONFIG_ENV_RANGE
CONFIG_ENV_RDADDR
CONFIG_ENV_REFLASH
CONFIG_FSL_DIU_FB
CONFIG_FSL_DMA
CONFIG_FSL_DSPI1
-CONFIG_FSL_ESDHC_ADAPTER_IDENT
CONFIG_FSL_ESDHC_PIN_MUX
CONFIG_FSL_FIXED_MMC_LOCATION
CONFIG_FSL_FM_10GEC_REGULAR_NOTATION
CONFIG_FSL_PMIC_MODE
CONFIG_FSL_QIXIS
CONFIG_FSL_QIXIS_CLOCK_MEASUREMENT
-CONFIG_FSL_QIXIS_V2
CONFIG_FSL_SATA_V2
CONFIG_FSL_SDHC_V2_3
CONFIG_FSL_SDRAM_TYPE
CONFIG_FSL_SERDES1
CONFIG_FSL_SERDES2
CONFIG_FSL_SGMII_RISER
-CONFIG_FSL_SPI_INTERFACE
CONFIG_FSL_TBCLK_EXTRA_DIV
CONFIG_FSL_TRUST_ARCH_v1
CONFIG_FSL_VIA
CONFIG_GREEN_LED
CONFIG_GURNARD_FPGA
CONFIG_GURNARD_SPLASH
-CONFIG_GZIP_COMPRESSED
-CONFIG_GZIP_COMPRESS_DEF_SZ
CONFIG_G_DNL_THOR_PRODUCT_NUM
CONFIG_G_DNL_THOR_VENDOR_NUM
CONFIG_G_DNL_UMS_PRODUCT_NUM
CONFIG_HAS_ETH1
CONFIG_HAS_ETH2
CONFIG_HAS_ETH3
-CONFIG_HAS_ETH4
CONFIG_HAS_ETH5
CONFIG_HAS_ETH7
CONFIG_HAS_FEC
CONFIG_I2C_CHIPADDRESS
CONFIG_I2C_CMD_TREE
CONFIG_I2C_ENV_EEPROM_BUS
-CONFIG_I2C_FPGA
CONFIG_I2C_GSC
CONFIG_I2C_MAC_OFFSET
CONFIG_I2C_MBB_TIMEOUT
CONFIG_IDE_PREINIT
CONFIG_IDE_RESET
CONFIG_IDE_SWAP_IO
-CONFIG_IDT8T49N222A
CONFIG_ID_EEPROM
CONFIG_IMA
CONFIG_IMX
CONFIG_IRAM_STACK
CONFIG_IRAM_TOP
CONFIG_IRDA_BASE
-CONFIG_IS_BUILTIN
CONFIG_IS_ENABLED
-CONFIG_IS_MODULE
CONFIG_JFFS2_CMDLINE
CONFIG_JFFS2_DEV
CONFIG_JFFS2_LZO
CONFIG_KONA
CONFIG_KONA_GPIO
CONFIG_KONA_RESET_S
-CONFIG_KPROBES
-CONFIG_KS8851_MLL
-CONFIG_KS8851_MLL_BASEADDR
CONFIG_KSNAV_NETCP_PDMA_CTRL_BASE
CONFIG_KSNAV_NETCP_PDMA_RX_BASE
CONFIG_KSNAV_NETCP_PDMA_RX_CH_NUM
CONFIG_LPC32XX_NAND_SLC_WHOLD
CONFIG_LPC32XX_NAND_SLC_WSETUP
CONFIG_LPC32XX_NAND_SLC_WWIDTH
-CONFIG_LPC32XX_SSP_TIMEOUT
CONFIG_LPC_BASE
CONFIG_LPC_IO_BASE
CONFIG_LPUART
CONFIG_MX35_HCLK_FREQ
CONFIG_MX6DL_LPDDR2
CONFIG_MX6DQ_LPDDR2
-CONFIG_MX6SX_SABRESD_REVA
CONFIG_MXC_EPDC
CONFIG_MXC_GPT_HCLK
CONFIG_MXC_MCI_REGS_BASE
CONFIG_PCI_SYS_BUS
CONFIG_PCI_SYS_PHYS
CONFIG_PCI_SYS_SIZE
-CONFIG_PCNET
CONFIG_PEN_ADDR_BIG_ENDIAN
CONFIG_PERIF1_FREQ
CONFIG_PERIF2_FREQ
CONFIG_PHY_IRAM_BASE
CONFIG_PHY_M88E1111
CONFIG_PHY_MODE_NEED_CHANGE
-CONFIG_PHY_RESET
CONFIG_PHY_RESET_DELAY
-CONFIG_PIXIS_BRDCFG0_SPI
-CONFIG_PIXIS_BRDCFG0_USB2
-CONFIG_PIXIS_BRDCFG1_AUDCLK_11
-CONFIG_PIXIS_BRDCFG1_AUDCLK_12
-CONFIG_PIXIS_BRDCFG1_AUDCLK_MASK
-CONFIG_PIXIS_BRDCFG1_SSI_TDM_MASK
-CONFIG_PIXIS_BRDCFG1_SSI_TDM_SSI
-CONFIG_PIXIS_BRDCFG1_TDM
CONFIG_PIXIS_SGMII_CMD
CONFIG_PL011_CLOCK
CONFIG_PL011_SERIAL_RLCR
CONFIG_PSRAM_SCFG
CONFIG_PWM
CONFIG_PXA_LCD
-CONFIG_PXA_MMC_GENERIC
CONFIG_PXA_PWR_I2C
CONFIG_PXA_STD_I2C
CONFIG_PXA_VGA
CONFIG_R7780MP
CONFIG_RAMBOOT
CONFIG_RAMBOOTCOMMAND
-CONFIG_RAMBOOTCOMMAND_TFTP
CONFIG_RAMBOOT_NAND
CONFIG_RAMBOOT_PBL
CONFIG_RAMBOOT_SDCARD
CONFIG_RESET_VECTOR_ADDRESS
CONFIG_RESTORE_FLASH
CONFIG_RES_BLOCK_SIZE
-CONFIG_REV1
-CONFIG_REV3
CONFIG_REVISION_TAG
CONFIG_RFSPART
CONFIG_RIO
CONFIG_SET_BOOTARGS
CONFIG_SET_DFU_ALT_BUF_LEN
CONFIG_SFIO
-CONFIG_SF_DATAFLASH
CONFIG_SGI_IP28
CONFIG_SH4_PCI
CONFIG_SH73A0
CONFIG_SOFT_I2C_GPIO_SCL
CONFIG_SOFT_I2C_GPIO_SDA
CONFIG_SOFT_I2C_READ_REPEATED_START
-CONFIG_SPARSE_RCU_POINTER
CONFIG_SPD_EEPROM
CONFIG_SPEAR300
CONFIG_SPEAR310
CONFIG_SPEAR_USBTTY
CONFIG_SPI_ADDR
CONFIG_SPI_BOOTING
-CONFIG_SPI_CS_IS_VALID
CONFIG_SPI_DATAFLASH_WRITE_VERIFY
CONFIG_SPI_FLASH_QUAD
CONFIG_SPI_FLASH_SIZE
CONFIG_SPI_IDLE_VAL
CONFIG_SPI_LENGTH
CONFIG_SPI_N25Q256A_RESET
-CONFIG_SPLASHIMAGE_GUARD
-CONFIG_SPLASH_SCREEN
-CONFIG_SPLASH_SCREEN_ALIGN
-CONFIG_SPLASH_SOURCE
CONFIG_SPLL_FREQ
CONFIG_SPL_
CONFIG_SPL_ATMEL_SIZE
CONFIG_SPL_INIT_MINIMAL
CONFIG_SPL_JR0_LIODN_NS
CONFIG_SPL_JR0_LIODN_S
-CONFIG_SPL_LOAD_FIT_ADDRESS
CONFIG_SPL_MAX_FOOTPRINT
CONFIG_SPL_MAX_PEB_SIZE
CONFIG_SPL_MAX_SIZE
CONFIG_SPL_MPC83XX_WAIT_FOR_NAND
CONFIG_SPL_MXS_PSWITCH_WAIT
-CONFIG_SPL_NAND_BASE
-CONFIG_SPL_NAND_DRIVERS
-CONFIG_SPL_NAND_ECC
-CONFIG_SPL_NAND_IDENT
CONFIG_SPL_NAND_INIT
CONFIG_SPL_NAND_LOAD
CONFIG_SPL_NAND_MINIMAL
CONFIG_SRIO_PCIE_BOOT_UCODE_ENV_MEM_BUS
CONFIG_SRIO_PCIE_BOOT_UCODE_ENV_MEM_PHYS
CONFIG_SRIO_PCIE_BOOT_UCODE_ENV_SIZE
-CONFIG_SSD_BR_PRELIM
-CONFIG_SSD_OR_PRELIM
CONFIG_SSE2
CONFIG_SSI1_FREQ
CONFIG_SSI2_FREQ
CONFIG_STV0991_HZ_CLOCK
CONFIG_ST_SMI
CONFIG_SUNXI_MAX_FB_SIZE
-CONFIG_SUVD3
CONFIG_SXNI855T
CONFIG_SYSFLAGS_ADDR
CONFIG_SYSFS
CONFIG_SYS_CKEN
CONFIG_SYS_CLK
CONFIG_SYS_CLKTL_CBCDR
-CONFIG_SYS_CLK_100
-CONFIG_SYS_CLK_100_DDR_100
-CONFIG_SYS_CLK_100_DDR_133
CONFIG_SYS_CLK_DIV
CONFIG_SYS_CLK_FREQ_C100
CONFIG_SYS_CLK_FREQ_C110
CONFIG_SYS_DCSR_DCFG_ADDR
CONFIG_SYS_DCSR_DCFG_OFFSET
CONFIG_SYS_DCU_ADDR
-CONFIG_SYS_DDR1_CS0_BNDS
CONFIG_SYS_DDR2_CFG_1A
CONFIG_SYS_DDR2_CFG_1B
CONFIG_SYS_DDR2_CFG_2
CONFIG_SYS_DDR_CLK_CTRL
CONFIG_SYS_DDR_CLK_CTRL_1000
CONFIG_SYS_DDR_CLK_CTRL_1200
-CONFIG_SYS_DDR_CLK_CTRL_1333
CONFIG_SYS_DDR_CLK_CTRL_667
CONFIG_SYS_DDR_CLK_CTRL_800
CONFIG_SYS_DDR_CLK_CTRL_900
CONFIG_SYS_DDR_CONFIG_256
CONFIG_SYS_DDR_CONTROL
CONFIG_SYS_DDR_CONTROL2
-CONFIG_SYS_DDR_CONTROL_1333
CONFIG_SYS_DDR_CONTROL_2
-CONFIG_SYS_DDR_CONTROL_2_1333
-CONFIG_SYS_DDR_CONTROL_2_800
-CONFIG_SYS_DDR_CONTROL_800
CONFIG_SYS_DDR_CPO
CONFIG_SYS_DDR_CS0_BNDS
CONFIG_SYS_DDR_CS0_CONFIG
-CONFIG_SYS_DDR_CS0_CONFIG_1333
CONFIG_SYS_DDR_CS0_CONFIG_2
-CONFIG_SYS_DDR_CS0_CONFIG_800
CONFIG_SYS_DDR_CS1_BNDS
CONFIG_SYS_DDR_CS1_CONFIG
CONFIG_SYS_DDR_CS1_CONFIG_2
CONFIG_SYS_DDR_INTERVAL
CONFIG_SYS_DDR_INTERVAL_1000
CONFIG_SYS_DDR_INTERVAL_1200
-CONFIG_SYS_DDR_INTERVAL_1333
CONFIG_SYS_DDR_INTERVAL_667
CONFIG_SYS_DDR_INTERVAL_800
CONFIG_SYS_DDR_INTERVAL_900
CONFIG_SYS_DDR_MODE_1
CONFIG_SYS_DDR_MODE_1_1000
CONFIG_SYS_DDR_MODE_1_1200
-CONFIG_SYS_DDR_MODE_1_1333
CONFIG_SYS_DDR_MODE_1_667
CONFIG_SYS_DDR_MODE_1_800
CONFIG_SYS_DDR_MODE_1_900
CONFIG_SYS_DDR_MODE_2
CONFIG_SYS_DDR_MODE_2_1000
CONFIG_SYS_DDR_MODE_2_1200
-CONFIG_SYS_DDR_MODE_2_1333
CONFIG_SYS_DDR_MODE_2_667
CONFIG_SYS_DDR_MODE_2_800
CONFIG_SYS_DDR_MODE_2_900
CONFIG_SYS_DDR_TIMING_0
CONFIG_SYS_DDR_TIMING_0_1000
CONFIG_SYS_DDR_TIMING_0_1200
-CONFIG_SYS_DDR_TIMING_0_1333
CONFIG_SYS_DDR_TIMING_0_667
CONFIG_SYS_DDR_TIMING_0_800
CONFIG_SYS_DDR_TIMING_0_900
CONFIG_SYS_DDR_TIMING_1
CONFIG_SYS_DDR_TIMING_1_1000
CONFIG_SYS_DDR_TIMING_1_1200
-CONFIG_SYS_DDR_TIMING_1_1333
CONFIG_SYS_DDR_TIMING_1_667
CONFIG_SYS_DDR_TIMING_1_800
CONFIG_SYS_DDR_TIMING_1_900
CONFIG_SYS_DDR_TIMING_2
CONFIG_SYS_DDR_TIMING_2_1000
CONFIG_SYS_DDR_TIMING_2_1200
-CONFIG_SYS_DDR_TIMING_2_1333
CONFIG_SYS_DDR_TIMING_2_667
CONFIG_SYS_DDR_TIMING_2_800
CONFIG_SYS_DDR_TIMING_2_900
CONFIG_SYS_DDR_TIMING_3
CONFIG_SYS_DDR_TIMING_3_1000
CONFIG_SYS_DDR_TIMING_3_1200
-CONFIG_SYS_DDR_TIMING_3_1333
CONFIG_SYS_DDR_TIMING_3_667
CONFIG_SYS_DDR_TIMING_3_800
CONFIG_SYS_DDR_TIMING_3_900
CONFIG_SYS_DDR_TIMING_4
-CONFIG_SYS_DDR_TIMING_4_1333
-CONFIG_SYS_DDR_TIMING_4_800
CONFIG_SYS_DDR_TIMING_5
-CONFIG_SYS_DDR_TIMING_5_1333
-CONFIG_SYS_DDR_TIMING_5_800
CONFIG_SYS_DDR_WRITE_DATA_DELAY
CONFIG_SYS_DDR_WRLVL_CNTL
CONFIG_SYS_DDR_WRLVL_CONTROL
-CONFIG_SYS_DDR_WRLVL_CONTROL_1333
CONFIG_SYS_DDR_WRLVL_CONTROL_667
CONFIG_SYS_DDR_WRLVL_CONTROL_800
CONFIG_SYS_DDR_ZQ_CNTL
CONFIG_SYS_DSPI_CTAR1
CONFIG_SYS_DSPI_CTAR2
CONFIG_SYS_DSPI_CTAR3
-CONFIG_SYS_DSPI_CTAR4
-CONFIG_SYS_DSPI_CTAR5
-CONFIG_SYS_DSPI_CTAR6
-CONFIG_SYS_DSPI_CTAR7
CONFIG_SYS_DV_NOR_BOOT_CFG
CONFIG_SYS_EBI_CFGR_VAL
CONFIG_SYS_EBI_CSA_VAL
CONFIG_SYS_ELO3_DMA3
CONFIG_SYS_EMAC_TI_CLKDIV
CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS
-CONFIG_SYS_ENABLE_PADS_ALL
CONFIG_SYS_ENET_BD_BASE
CONFIG_SYS_ENV_ADDR
CONFIG_SYS_ENV_SECT_SIZE
CONFIG_SYS_FLASH_WRITE_TOUT
CONFIG_SYS_FLYCNFG_VAL
CONFIG_SYS_FM1_10GEC1_PHY_ADDR
-CONFIG_SYS_FM1_10GEC2_PHY_ADDR
CONFIG_SYS_FM1_CLK
CONFIG_SYS_FM1_DTSEC1_MDIO_ADDR
CONFIG_SYS_FM1_DTSEC1_PHY_ADDR
CONFIG_SYS_FM1_DTSEC4_RISER_PHY_ADDR
CONFIG_SYS_FM1_DTSEC5_PHY_ADDR
CONFIG_SYS_FM1_DTSEC_MDIO_ADDR
-CONFIG_SYS_FM1_ONBOARD_PHY1_ADDR
-CONFIG_SYS_FM1_ONBOARD_PHY2_ADDR
CONFIG_SYS_FM1_QSGMII11_PHY_ADDR
CONFIG_SYS_FM1_QSGMII21_PHY_ADDR
CONFIG_SYS_FM1_TGEC_MDIO_ADDR
CONFIG_SYS_FPGAREG_RESET_CODE
CONFIG_SYS_FPGA_AMASK
CONFIG_SYS_FPGA_BASE
-CONFIG_SYS_FPGA_BASE_PHYS
CONFIG_SYS_FPGA_CHECK_BUSY
CONFIG_SYS_FPGA_CHECK_CTRLC
CONFIG_SYS_FPGA_CHECK_ERROR
CONFIG_SYS_FSL_DRAM_SIZE2
CONFIG_SYS_FSL_DRAM_SIZE3
CONFIG_SYS_FSL_DSPI_BE
-CONFIG_SYS_FSL_DSP_CCSRBAR
CONFIG_SYS_FSL_DSP_CCSRBAR_DEFAULT
-CONFIG_SYS_FSL_DSP_CCSRBAR_PHYS
CONFIG_SYS_FSL_DSP_CCSR_DDR_ADDR
CONFIG_SYS_FSL_DSP_CCSR_DDR_OFFSET
CONFIG_SYS_FSL_DSP_DDR_ADDR
CONFIG_SYS_FSL_QMAN_ADDR
CONFIG_SYS_FSL_QMAN_OFFSET
CONFIG_SYS_FSL_QMAN_V3
-CONFIG_SYS_FSL_QSPI_AHB
CONFIG_SYS_FSL_QSPI_BASE
CONFIG_SYS_FSL_QSPI_BASE1
CONFIG_SYS_FSL_QSPI_BASE2
-CONFIG_SYS_FSL_QSPI_BE
CONFIG_SYS_FSL_QSPI_LE
CONFIG_SYS_FSL_QSPI_SIZE
CONFIG_SYS_FSL_QSPI_SIZE1
CONFIG_SYS_FTSDMC021_TP1
CONFIG_SYS_FTSDMC021_TP2
CONFIG_SYS_FTSMC020_CONFIGS
-CONFIG_SYS_FULL_VA
CONFIG_SYS_GAFR0_L_VAL
CONFIG_SYS_GAFR0_U_VAL
CONFIG_SYS_GAFR1_L_VAL
CONFIG_SYS_I2C_PCA953X_ADDR3
CONFIG_SYS_I2C_PCA953X_WIDTH
CONFIG_SYS_I2C_PCA9553_ADDR
-CONFIG_SYS_I2C_PCA9555_ADDR
CONFIG_SYS_I2C_PCA9557_ADDR
CONFIG_SYS_I2C_PCF8574A_ADDR
CONFIG_SYS_I2C_PEX8518_ADDR
CONFIG_SYS_MALLOC_SIMPLE
CONFIG_SYS_MAMR
CONFIG_SYS_MAPLE
-CONFIG_SYS_MAPLE_MEM_PHYS
CONFIG_SYS_MAPPED_RAM_BASE
CONFIG_SYS_MASTER_CLOCK
CONFIG_SYS_MATRIX_EBI0CSA_VAL
CONFIG_SYS_MEMAC_LITTLE_ENDIAN
CONFIG_SYS_MEMORY_BASE
CONFIG_SYS_MEMORY_SIZE
-CONFIG_SYS_MEMTEST_END
-CONFIG_SYS_MEMTEST_SCRATCH
-CONFIG_SYS_MEMTEST_START
CONFIG_SYS_MEM_MAP
CONFIG_SYS_MEM_RESERVE_SECURE
CONFIG_SYS_MEM_SIZE
CONFIG_SYS_MHZ
CONFIG_SYS_MII_MODE
CONFIG_SYS_MIPS_TIMER_FREQ
-CONFIG_SYS_MMCSD_FS_BOOT_PARTITION
CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR
CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS
CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR
CONFIG_SYS_MMC_BASE
CONFIG_SYS_MMC_CD_PIN
CONFIG_SYS_MMC_CLK_OD
-CONFIG_SYS_MMC_ENV_DEV
-CONFIG_SYS_MMC_ENV_PART
CONFIG_SYS_MMC_MAX_BLK_COUNT
CONFIG_SYS_MMC_MAX_DEVICE
CONFIG_SYS_MMC_U_BOOT_DST
CONFIG_SYS_NS16550_PORT_MAPPED
CONFIG_SYS_NS16550_REG_SIZE
CONFIG_SYS_NS16550_SERIAL
-CONFIG_SYS_NUM_ADDR_MAP
CONFIG_SYS_NUM_CPC
CONFIG_SYS_NUM_FM1_10GEC
CONFIG_SYS_NUM_FM1_DTSEC
CONFIG_SYS_PIXIS_VCFGEN0_ENABLE
CONFIG_SYS_PJPAR
CONFIG_SYS_PL310_BASE
-CONFIG_SYS_PLATFORM_SRAM_BASE
-CONFIG_SYS_PLATFORM_SRAM_BASE_PHYS
-CONFIG_SYS_PLATFORM_SRAM_SIZE
CONFIG_SYS_PLLAR_VAL
CONFIG_SYS_PLLBR_VAL
CONFIG_SYS_PLLCR
CONFIG_SYS_SPCR_TSEC1EP
CONFIG_SYS_SPCR_TSEC2EP
CONFIG_SYS_SPD_BUS_NUM
-CONFIG_SYS_SPI0
-CONFIG_SYS_SPI0_NUM_CS
-CONFIG_SYS_SPI1
-CONFIG_SYS_SPI1_BASE
-CONFIG_SYS_SPI1_NUM_CS
-CONFIG_SYS_SPI2
-CONFIG_SYS_SPI2_BASE
-CONFIG_SYS_SPI2_NUM_CS
CONFIG_SYS_SPI_ARGS_OFFS
CONFIG_SYS_SPI_ARGS_SIZE
CONFIG_SYS_SPI_BASE
CONFIG_SYS_SPI_RTC_DEVID
CONFIG_SYS_SPI_ST_ENABLE_WP_PIN
CONFIG_SYS_SPI_U_BOOT_SIZE
-CONFIG_SYS_SPI_WRITE_TOUT
CONFIG_SYS_SPL_ARGS_ADDR
CONFIG_SYS_SPL_LEN
CONFIG_SYS_SPL_MALLOC_SIZE
CONFIG_SYS_SPL_MALLOC_START
CONFIG_SYS_SPR
-CONFIG_SYS_SRAM_BASE
-CONFIG_SYS_SRAM_SIZE
-CONFIG_SYS_SRAM_START
CONFIG_SYS_SRIO
CONFIG_SYS_SRIO1_MEM_BASE
CONFIG_SYS_SRIO1_MEM_BUS
CONFIG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR_PHYS
CONFIG_SYS_SRIO_PCIE_BOOT_UCODE_ENV_ADDR
CONFIG_SYS_SRIO_PCIE_BOOT_UCODE_ENV_ADDR_PHYS
-CONFIG_SYS_SSD_BASE
-CONFIG_SYS_SSD_BASE_PHYS
CONFIG_SYS_SST_SECT
CONFIG_SYS_SST_SECTSZ
CONFIG_SYS_STACK_SIZE
CONFIG_SYS_XHCI_USB2_ADDR
CONFIG_SYS_XHCI_USB3_ADDR
CONFIG_SYS_XIMG_LEN
-CONFIG_SYS_ZYNQ_QSPI_WAIT
-CONFIG_SYS_ZYNQ_SPI_WAIT
CONFIG_SYS_i2C_FSL
CONFIG_TAM3517_SETTINGS
CONFIG_TCA642X
CONFIG_TESTPIN_MASK
CONFIG_TESTPIN_REG
CONFIG_TEST_LIST_SORT
-CONFIG_TFP410_I2C_ADDR
CONFIG_TFTP_FILE_NAME_MAX_LEN
CONFIG_TFTP_PORT
CONFIG_TFTP_TSIZE
CONFIG_TSECV2_1
CONFIG_TSEC_TBI
CONFIG_TSEC_TBICR_SETTINGS
-CONFIG_TULIP
CONFIG_TWL6030_INPUT
CONFIG_TWL6030_POWER
-CONFIG_TWR
-CONFIG_TWR_P1025
CONFIG_TX_DESCR_NUM
CONFIG_TZSW_RESERVED_DRAM_SIZE
CONFIG_UART_BR_PRELIM
CONFIG_USB_XHCI_OMAP
CONFIG_USER_LOWLEVEL_INIT
CONFIG_USE_INTERRUPT
-CONFIG_USE_NOR
CONFIG_USE_ONENAND_BOARD_INIT
CONFIG_USE_SPIFLASH
CONFIG_UTBIPAR_INIT_TBIPA
CONFIG_VSC7385_IMAGE
CONFIG_VSC7385_IMAGE_SIZE
CONFIG_VSC9953
-CONFIG_VSC_CROSSBAR
CONFIG_WATCHDOG_NOWAYOUT
CONFIG_WATCHDOG_PRESC
CONFIG_WATCHDOG_RC
CONFIG_X86_REFCODE_ADDR
CONFIG_X86_REFCODE_RUN_ADDR
CONFIG_XGI_XG22_BASE
-CONFIG_XILINX_SPI_IDLE_VAL
CONFIG_XSENGINE
CONFIG_XTFPGA
CONFIG_YAFFSFS_PROVIDE_VALUES
CONFIG_YAFFS_WINCE
CONFIG_YELLOW_LED
CONFIG_ZLT
-CONFIG_ZM7300
CONFIG_eTSEC_MDIO_BUS