CONFIG_ARM_GIC_BASE_ADDRESS
CONFIG_AUTO_ZRELADDR
CONFIG_BOARDDIR
-CONFIG_BOOTSCRIPT_ADDR
-CONFIG_BOOTSCRIPT_COPY_RAM
-CONFIG_BOOTSCRIPT_HDR_ADDR
-CONFIG_BS_ADDR_DEVICE
-CONFIG_BS_ADDR_RAM
-CONFIG_BS_COPY_CMD
-CONFIG_BS_COPY_ENV
-CONFIG_BS_HDR_ADDR_DEVICE
-CONFIG_BS_HDR_ADDR_RAM
-CONFIG_BS_HDR_SIZE
-CONFIG_BS_SIZE
-CONFIG_CHAIN_BOOT_CMD
-CONFIG_DEFAULT
CONFIG_DFU_ALT
CONFIG_DFU_ALT_BOOT_EMMC
CONFIG_DFU_ALT_BOOT_SD
CONFIG_DM9000_DEBUG
CONFIG_DM9000_NO_SROM
CONFIG_DM9000_USE_16BIT
-CONFIG_DP_DDR_DIMM_SLOTS_PER_CTLR
-CONFIG_DSP_CLUSTER_START
-CONFIG_DWC_AHSATA_BASE_ADDR
-CONFIG_DWC_AHSATA_PORT_ID
-CONFIG_DW_ALTDESCRIPTOR
-CONFIG_DW_GMAC_DEFAULT_DMA_PBL
-CONFIG_DW_WDT_BASE
CONFIG_DW_WDT_CLOCK_KHZ
-CONFIG_E1000_NO_NVM
-CONFIG_EFLASH_PROTSECTORS
-CONFIG_EHCI_DESC_BIG_ENDIAN
-CONFIG_EHCI_HCD_INIT_AFTER_RESET
-CONFIG_EHCI_MMIO_BIG_ENDIAN
-CONFIG_EHCI_MXS_PORT0
-CONFIG_EHCI_MXS_PORT1
-CONFIG_EMU
-CONFIG_ENABLE_36BIT_PHYS
-CONFIG_ENABLE_MMU
CONFIG_ENV_FLAGS_LIST_STATIC
CONFIG_ENV_IS_EMBEDDED
-CONFIG_ENV_MAX_ENTRIES
-CONFIG_ENV_MIN_ENTRIES
-CONFIG_ENV_RANGE
-CONFIG_ENV_REFLASH
CONFIG_ENV_SETTINGS_BUTTONS_AND_LEDS
CONFIG_ENV_SETTINGS_NAND_V1
CONFIG_ENV_SETTINGS_NAND_V2
CONFIG_ENV_SETTINGS_V2
CONFIG_ENV_SROM_BANK
CONFIG_ENV_TOTAL_SIZE
-CONFIG_ENV_VERSION
-CONFIG_ESBC_ADDR_64BIT
-CONFIG_ESBC_HDR_LS
-CONFIG_ESDHC_DETECT_QUIRK
-CONFIG_ESDHC_HC_BLK_ADDR
-CONFIG_ESPRESSO7420
CONFIG_ET1100_BASE
CONFIG_ETHBASE
-CONFIG_EXTRA_CLOCK
-CONFIG_EXTRA_ENV
CONFIG_EXTRA_ENV_SETTINGS
-CONFIG_EXTRA_ENV_SETTINGS_COMMON
-CONFIG_EXYNOS4
-CONFIG_EXYNOS4210
-CONFIG_EXYNOS5
-CONFIG_EXYNOS5250
-CONFIG_EXYNOS5420
-CONFIG_EXYNOS5_DT
-CONFIG_EXYNOS_ACE_SHA
-CONFIG_EXYNOS_DP
-CONFIG_EXYNOS_FB
-CONFIG_EXYNOS_MIPI_DSIM
-CONFIG_EXYNOS_RELOCATE_CODE_BASE
-CONFIG_EXYNOS_SPL
-CONFIG_EXYNOS_TMU
-CONFIG_FACTORYSET
CONFIG_FB_ADDR
CONFIG_FDTADDR
CONFIG_FDTFILE
CONFIG_FEC_FIXED_SPEED
CONFIG_FEC_MXC_PHYADDR
CONFIG_FLASH_BR_PRELIM
-CONFIG_FLASH_CFI_LEGACY
CONFIG_FLASH_OR_PRELIM
CONFIG_FLASH_SECTOR_SIZE
CONFIG_FLASH_SHOW_PROGRESS
CONFIG_FLASH_SPANSION_S29WS_N
CONFIG_FLASH_VERIFY
CONFIG_FM_PLAT_CLK_DIV
-CONFIG_FPGA_COUNT
-CONFIG_FPGA_STRATIX_V
CONFIG_FSL_CADMUS
-CONFIG_FSL_CORENET
CONFIG_FSL_CPLD
CONFIG_FSL_DEVICE_DISABLE
-CONFIG_FSL_DSPI1
CONFIG_FSL_ESDHC_PIN_MUX
-CONFIG_FSL_FIXED_MMC_LOCATION
CONFIG_FSL_FM_10GEC_REGULAR_NOTATION
CONFIG_FSL_IIM
CONFIG_FSL_ISBC_KEY_EXT
CONFIG_FSL_LBC
-CONFIG_FSL_MEMAC
-CONFIG_FSL_NGPIXIS
CONFIG_FSL_PMIC_BITLEN
CONFIG_FSL_PMIC_BUS
CONFIG_FSL_PMIC_CLK
CONFIG_FSL_PMIC_CS
CONFIG_FSL_PMIC_MODE
-CONFIG_FSL_SATA_V2
CONFIG_FSL_SDHC_V2_3
CONFIG_FSL_SERDES
CONFIG_FSL_SERDES1
CONFIG_G_DNL_THOR_VENDOR_NUM
CONFIG_G_DNL_UMS_PRODUCT_NUM
CONFIG_G_DNL_UMS_VENDOR_NUM
-CONFIG_HAS_FSL_DR_USB
-CONFIG_HAS_FSL_MPH_USB
CONFIG_HDMI_ENCODER_I2C_ADDR
-CONFIG_HETROGENOUS_CLUSTERS
CONFIG_HIDE_LOGO_VERSION
CONFIG_HIKEY_GPIO
CONFIG_HOSTNAME
CONFIG_I2C_MVTWSI_BASE1
CONFIG_I2C_RTC_ADDR
CONFIG_ICS307_REFCLK_HZ
-CONFIG_IDE_PREINIT
CONFIG_IMX
CONFIG_IMX6_PWM_PER_CLK
CONFIG_IMX_HDMI
CONFIG_IRAM_END
CONFIG_IRAM_SIZE
CONFIG_IRAM_TOP
-CONFIG_KEY_REVOCATION
-CONFIG_KIRKWOOD_EGIGA_INIT
-CONFIG_KIRKWOOD_PCIE_INIT
-CONFIG_KIRKWOOD_RGMII_PAD_1V8
CONFIG_KM_BOARD_EXTRA_ENV
CONFIG_KM_DEF_ARCH
CONFIG_KM_DEF_BOOT_ARGS_CPU
CONFIG_KM_DEF_ENV_CPU
CONFIG_KM_DEF_ENV_FLASH_BOOT
CONFIG_KM_DEV_ENV_FLASH_BOOT_UBI
-CONFIG_KM_DISABLE_PCIE
CONFIG_KM_ECC_MODE
CONFIG_KM_NEW_ENV
CONFIG_KM_ROOTFSSIZE
CONFIG_KSNET_SERDES_SGMII_BASE
CONFIG_L1_INIT_RAM
CONFIG_L2_CACHE
-CONFIG_LAYERSCAPE_NS_ACCESS
-CONFIG_LBA48
CONFIG_LCD_ALIGNMENT
CONFIG_LCD_MENU
CONFIG_LD9040
CONFIG_NS16550_MIN_FUNCTIONS
CONFIG_NUM_DSP_CPUS
CONFIG_ODROID_REV_AIN
-CONFIG_ORIGEN
CONFIG_OTHBOOTARGS
CONFIG_OVERWRITE_ETHADDR_ONCE
-CONFIG_PALMAS_POWER
CONFIG_PCA953X
-CONFIG_PCI1
-CONFIG_PCI2
-CONFIG_PCIE1
-CONFIG_PCIE2
-CONFIG_PCIE3
-CONFIG_PCIE4
-CONFIG_PCIE_IMX
CONFIG_PCIE_IMX_PERST_GPIO
CONFIG_PCIE_IMX_POWER_GPIO
-CONFIG_PCI_CLK_FREQ
-CONFIG_PCI_CONFIG_HOST_BRIDGE
-CONFIG_PCI_GT64120
-CONFIG_PCI_IO_BUS
-CONFIG_PCI_IO_PHYS
-CONFIG_PCI_IO_SIZE
-CONFIG_PCI_MEM_BUS
-CONFIG_PCI_MEM_PHYS
-CONFIG_PCI_MEM_SIZE
-CONFIG_PCI_MSC01
-CONFIG_PCI_OHCI
-CONFIG_PCI_PREF_BUS
-CONFIG_PCI_PREF_PHYS
-CONFIG_PCI_PREF_SIZE
-CONFIG_PCI_SCAN_SHOW
CONFIG_PEN_ADDR_BIG_ENDIAN
CONFIG_PHY_BASE_ADR
CONFIG_PHY_ET1011C_TX_CLK_FIX
CONFIG_PL011_CLOCK
CONFIG_PL01x_PORTS
CONFIG_PM
-CONFIG_PMC_BR_PRELIM
-CONFIG_PMC_OR_PRELIM
CONFIG_PME_PLAT_CLK_DIV
CONFIG_POST
CONFIG_POSTBOOTMENU
CONFIG_POWER_TPS65090_EC
CONFIG_POWER_TPS65218
CONFIG_POWER_TPS65910
-CONFIG_PPC_CLUSTER_START
CONFIG_PPC_SPINTABLE_COMPATIBLE
CONFIG_PRAM
CONFIG_PSRAM_SCFG
-CONFIG_PWM
-CONFIG_PXA_VGA
CONFIG_QBMAN_CLK_DIV
-CONFIG_RAMBOOT_NAND
CONFIG_RAMBOOT_SPIFLASH
CONFIG_RAMBOOT_TEXT_BASE
CONFIG_RAMDISK_ADDR
CONFIG_RD_LVL
CONFIG_RESET_VECTOR_ADDRESS
-CONFIG_RESTORE_FLASH
-CONFIG_ROCKCHIP_CHIP_TAG
-CONFIG_ROCKCHIP_MAX_INIT_SIZE
CONFIG_ROCKCHIP_SDHCI_MAX_FREQ
CONFIG_ROOTPATH
CONFIG_RTC_DS1337
CONFIG_RTC_MCFRRTC
CONFIG_RTC_MXS
CONFIG_RTC_PT7C4338
-CONFIG_S5P
-CONFIG_S5PC100
-CONFIG_S5PC110
-CONFIG_S5P_PA_SYSRAM
CONFIG_SAMA5D3_LCD_BASE
-CONFIG_SAMSUNG
-CONFIG_SAMSUNG_ONENAND
CONFIG_SANDBOX_ARCH
CONFIG_SANDBOX_SDL
CONFIG_SANDBOX_SPI_MAX_BUS
CONFIG_SANDBOX_SPI_MAX_CS
CONFIG_SAR2_REG
CONFIG_SAR_REG
-CONFIG_SATA1
-CONFIG_SATA2
CONFIG_SCIF_A
CONFIG_SCSI_DEV_LIST
CONFIG_SC_TIMER_CLK
CONFIG_SDRAM_OFFSET_FOR_RT
-CONFIG_SECBOOT
CONFIG_SERIAL_BOOT
CONFIG_SERIAL_SOFTWARE_FIFO
CONFIG_SERVERIP
CONFIG_SETUP_INITRD_TAG
-CONFIG_SET_BOOTARGS
CONFIG_SET_DFU_ALT_BUF_LEN
CONFIG_SH73A0
-CONFIG_SH7751_PCI
CONFIG_SH_ETHER_ALIGNE_SIZE
CONFIG_SH_ETHER_BASE_ADDR
CONFIG_SH_ETHER_CACHE_INVALIDATE
CONFIG_SH_QSPI_BASE
CONFIG_SKIP_LOCAL_MAC_RANDOMIZATION
CONFIG_SLIC
-CONFIG_SMC91111
-CONFIG_SMC91111_BASE
-CONFIG_SMC91111_EXT_PHY
-CONFIG_SMC_USE_32_BIT
CONFIG_SMDK5420
CONFIG_SMP_PEN_ADDR
CONFIG_SMSC_LPC47M
CONFIG_STACKBASE
CONFIG_STANDALONE_LOAD_ADDR
CONFIG_STD_DEVICES_SETTINGS
-CONFIG_SYS_64BIT
-CONFIG_SYS_64BIT_LBA
-CONFIG_SYS_83XX_DDR_USES_CS0
CONFIG_SYS_AMASK0
CONFIG_SYS_AMASK1
CONFIG_SYS_AMASK1_FINAL
CONFIG_SYS_AT91_PLLA
CONFIG_SYS_AT91_PLLB
CONFIG_SYS_AT91_SLOW_CLOCK
-CONFIG_SYS_AUTOLOAD
-CONFIG_SYS_AUTOMATIC_SDRAM_DETECTION
-CONFIG_SYS_AUXCORE_BOOTDATA
CONFIG_SYS_BAUDRATE_TABLE
-CONFIG_SYS_BFTIC3_BASE
-CONFIG_SYS_BFTIC3_SIZE
CONFIG_SYS_BMAN_CENA_BASE
CONFIG_SYS_BMAN_CENA_SIZE
CONFIG_SYS_BMAN_CINH_BASE
CONFIG_SYS_BMAN_SP_CENA_SIZE
CONFIG_SYS_BMAN_SP_CINH_SIZE
CONFIG_SYS_BMAN_SWP_ISDR_REG
-CONFIG_SYS_BOOK3E_HV
-CONFIG_SYS_BOOTCOUNT_BE
-CONFIG_SYS_BOOTCOUNT_LE
CONFIG_SYS_BOOTMAPSZ
-CONFIG_SYS_BOOTM_LEN
-CONFIG_SYS_BOOT_BLOCK
-CONFIG_SYS_BOOT_RAMDISK_HIGH
CONFIG_SYS_CACHE_ACR0
CONFIG_SYS_CACHE_ACR1
CONFIG_SYS_CACHE_ACR2
CONFIG_SYS_CACHE_DCACR
CONFIG_SYS_CACHE_ICACR
-CONFIG_SYS_CACHE_STASHING
CONFIG_SYS_CCSRBAR
CONFIG_SYS_CCSRBAR_PHYS
CONFIG_SYS_CCSRBAR_PHYS_HIGH
CONFIG_SYS_CCSRBAR_PHYS_LOW
CONFIG_SYS_CLK
CONFIG_SYS_CLKTL_CBCDR
-CONFIG_SYS_CORE_SRAM
-CONFIG_SYS_CORE_SRAM_SIZE
-CONFIG_SYS_CPC_REINIT_F
CONFIG_SYS_CPLD_AMASK
CONFIG_SYS_CPLD_BASE
CONFIG_SYS_CPLD_BASE_PHYS
CONFIG_SYS_CPLD_FTIM1
CONFIG_SYS_CPLD_FTIM2
CONFIG_SYS_CPLD_FTIM3
-CONFIG_SYS_CPLD_SIZE
-CONFIG_SYS_CPRI
-CONFIG_SYS_CPRI_CLK
-CONFIG_SYS_CPUSPEED
CONFIG_SYS_CPU_CLK
CONFIG_SYS_CS0_BASE
CONFIG_SYS_CS0_CTRL
CONFIG_SYS_CS0_FTIM2
CONFIG_SYS_CS0_FTIM3
CONFIG_SYS_CS0_MASK
-CONFIG_SYS_CS0_SIZE
CONFIG_SYS_CS1_BASE
CONFIG_SYS_CS1_CTRL
CONFIG_SYS_CS1_FTIM0
CONFIG_SYS_DA850_PLL0_PLLM
CONFIG_SYS_DA850_PLL1_PLLM
CONFIG_SYS_DA850_SYSCFG_SUSPSRC
-CONFIG_SYS_DAVINCI_I2C_SLAVE
-CONFIG_SYS_DAVINCI_I2C_SLAVE1
-CONFIG_SYS_DAVINCI_I2C_SLAVE2
-CONFIG_SYS_DAVINCI_I2C_SPEED
-CONFIG_SYS_DAVINCI_I2C_SPEED1
-CONFIG_SYS_DAVINCI_I2C_SPEED2
CONFIG_SYS_DCACHE_INV
CONFIG_SYS_DCSRBAR
CONFIG_SYS_DCSRBAR_PHYS
-CONFIG_SYS_DCSR_COP_CCP_ADDR
CONFIG_SYS_DCSR_DCFG_ADDR
CONFIG_SYS_DCSR_DCFG_OFFSET
-CONFIG_SYS_DCU_ADDR
CONFIG_SYS_DDRCDR
CONFIG_SYS_DDRCDR_VALUE
CONFIG_SYS_DDRUA
CONFIG_SYS_DDR_CLK_CNTL
CONFIG_SYS_DDR_CLK_CONTROL
CONFIG_SYS_DDR_CLK_CTRL
-CONFIG_SYS_DDR_CLK_CTRL_667
CONFIG_SYS_DDR_CLK_CTRL_800
CONFIG_SYS_DDR_CONFIG
CONFIG_SYS_DDR_CONFIG_2
-CONFIG_SYS_DDR_CONFIG_256
CONFIG_SYS_DDR_CONTROL
CONFIG_SYS_DDR_CONTROL_2
CONFIG_SYS_DDR_CS0_BNDS
CONFIG_SYS_DDR_CS1_BNDS
CONFIG_SYS_DDR_CS1_CONFIG
CONFIG_SYS_DDR_CS1_CONFIG_2
-CONFIG_SYS_DDR_DATA_INIT
CONFIG_SYS_DDR_INIT_ADDR
CONFIG_SYS_DDR_INIT_EXT_ADDR
CONFIG_SYS_DDR_INTERVAL
-CONFIG_SYS_DDR_INTERVAL_667
CONFIG_SYS_DDR_INTERVAL_800
CONFIG_SYS_DDR_MODE
CONFIG_SYS_DDR_MODE2
CONFIG_SYS_DDR_MODE_1
-CONFIG_SYS_DDR_MODE_1_667
CONFIG_SYS_DDR_MODE_1_800
CONFIG_SYS_DDR_MODE_2
-CONFIG_SYS_DDR_MODE_2_667
CONFIG_SYS_DDR_MODE_2_800
CONFIG_SYS_DDR_MODE_CONTROL
-CONFIG_SYS_DDR_RAW_TIMING
CONFIG_SYS_DDR_RCW_1
CONFIG_SYS_DDR_RCW_2
CONFIG_SYS_DDR_SDRAM_BASE
CONFIG_SYS_DDR_SDRAM_CFG
CONFIG_SYS_DDR_SDRAM_CFG2
CONFIG_SYS_DDR_SDRAM_CLK_CNTL
-CONFIG_SYS_DDR_SIZE
CONFIG_SYS_DDR_SR_CNTR
CONFIG_SYS_DDR_TIMING_0
-CONFIG_SYS_DDR_TIMING_0_667
CONFIG_SYS_DDR_TIMING_0_800
CONFIG_SYS_DDR_TIMING_1
-CONFIG_SYS_DDR_TIMING_1_667
CONFIG_SYS_DDR_TIMING_1_800
CONFIG_SYS_DDR_TIMING_2
-CONFIG_SYS_DDR_TIMING_2_667
CONFIG_SYS_DDR_TIMING_2_800
CONFIG_SYS_DDR_TIMING_3
-CONFIG_SYS_DDR_TIMING_3_667
CONFIG_SYS_DDR_TIMING_3_800
CONFIG_SYS_DDR_TIMING_4
CONFIG_SYS_DDR_TIMING_5
CONFIG_SYS_DDR_WRLVL_CONTROL
-CONFIG_SYS_DDR_WRLVL_CONTROL_667
-CONFIG_SYS_DDR_WRLVL_CONTROL_800
CONFIG_SYS_DDR_ZQ_CONTROL
-CONFIG_SYS_DEBUG
-CONFIG_SYS_DEBUG_SERVER_FW_ADDR
-CONFIG_SYS_DEBUG_SERVER_FW_IN_NOR
-CONFIG_SYS_DEFAULT_LPDDR2_TIMINGS
CONFIG_SYS_DIALOG_PMIC_I2C_ADDR
-CONFIG_SYS_DIRECT_FLASH_TFTP
-CONFIG_SYS_DISCOVER_PHY
CONFIG_SYS_DPAA_DCE
CONFIG_SYS_DPAA_FMAN
CONFIG_SYS_DPAA_PME
CONFIG_SYS_DPAA_RMAN
-CONFIG_SYS_DRAM_SIZE
CONFIG_SYS_DRAM_TEST
-CONFIG_SYS_DSPI_CTAR0
-CONFIG_SYS_DSPI_CTAR1
-CONFIG_SYS_DSPI_CTAR2
-CONFIG_SYS_DSPI_CTAR3
CONFIG_SYS_DV_NOR_BOOT_CFG
CONFIG_SYS_EEPROM_BUS_NUM
-CONFIG_SYS_EEPROM_PAGE_WRITE_ENABLE
CONFIG_SYS_EEPROM_WREN
-CONFIG_SYS_EHCI_USB1_ADDR
-CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS
-CONFIG_SYS_ENET_BD_BASE
CONFIG_SYS_ENV_SECT_SIZE
CONFIG_SYS_ETHOC_BASE
CONFIG_SYS_ETHOC_BUFFER_ADDR
-CONFIG_SYS_ETVPE_CLK
CONFIG_SYS_EXCEPTION_VECTORS_HIGH
CONFIG_SYS_FAST_CLK
-CONFIG_SYS_FDT_PAD
-CONFIG_SYS_FECI2C
CONFIG_SYS_FEC_BUF_USE_SRAM
CONFIG_SYS_FLASH0
CONFIG_SYS_FLASH1
CONFIG_SYS_FLASH_BANKS_LIST
CONFIG_SYS_FLASH_BANKS_SIZES
CONFIG_SYS_FLASH_BASE
-CONFIG_SYS_FLASH_BASE0
-CONFIG_SYS_FLASH_BASE1
CONFIG_SYS_FLASH_BASE_PHYS
CONFIG_SYS_FLASH_BASE_PHYS_EARLY
-CONFIG_SYS_FLASH_BR_PRELIM
-CONFIG_SYS_FLASH_CFI_NONBLOCK
-CONFIG_SYS_FLASH_CHECKSUM
-CONFIG_SYS_FLASH_EMPTY_INFO
-CONFIG_SYS_FLASH_ERASE_TOUT
-CONFIG_SYS_FLASH_LOCK_TOUT
-CONFIG_SYS_FLASH_OR_PRELIM
CONFIG_SYS_FLASH_PARMSECT_SZ
-CONFIG_SYS_FLASH_QUIET_TEST
-CONFIG_SYS_FLASH_SECT_SIZE
-CONFIG_SYS_FLASH_SECT_SZ
CONFIG_SYS_FLASH_SIZE
-CONFIG_SYS_FLASH_UNLOCK_TOUT
-CONFIG_SYS_FLASH_WRITE_TOUT
CONFIG_SYS_FM1_10GEC1_PHY_ADDR
CONFIG_SYS_FM1_CLK
CONFIG_SYS_FM1_DTSEC1_PHY_ADDR
CONFIG_SYS_FM2_DTSEC2_PHY_ADDR
CONFIG_SYS_FM2_DTSEC3_PHY_ADDR
CONFIG_SYS_FM2_DTSEC4_PHY_ADDR
-CONFIG_SYS_FMAN_V3
CONFIG_SYS_FM_MURAM_SIZE
-CONFIG_SYS_FPGAREG_DATE
CONFIG_SYS_FPGAREG_DIPSW
CONFIG_SYS_FPGAREG_FREQ
CONFIG_SYS_FPGAREG_RESET
CONFIG_SYS_FPGA_FTIM1
CONFIG_SYS_FPGA_FTIM2
CONFIG_SYS_FPGA_FTIM3
-CONFIG_SYS_FPGA_PROG_FEEDBACK
CONFIG_SYS_FPGA_SIZE
CONFIG_SYS_FPGA_WAIT
CONFIG_SYS_FSL_BMAN_ADDR
CONFIG_SYS_FSL_BMAN_OFFSET
-CONFIG_SYS_FSL_CCSR_GUR_BE
-CONFIG_SYS_FSL_CCSR_GUR_LE
-CONFIG_SYS_FSL_CCSR_SCFG_BE
-CONFIG_SYS_FSL_CCSR_SCFG_LE
CONFIG_SYS_FSL_CH3_CLK_CTRL_ADDR
CONFIG_SYS_FSL_CH3_CLK_GRPA_ADDR
CONFIG_SYS_FSL_CH3_CLK_GRPB_ADDR
CONFIG_SYS_FSL_CORENET_SERDES_ADDR
CONFIG_SYS_FSL_CORENET_SERDES_OFFSET
CONFIG_SYS_FSL_CORENET_SNOOPVEC_COREONLY
-CONFIG_SYS_FSL_CORES_PER_CLUSTER
-CONFIG_SYS_FSL_CPC
CONFIG_SYS_FSL_CPC_ADDR
CONFIG_SYS_FSL_CPC_OFFSET
CONFIG_SYS_FSL_CSU_ADDR
-CONFIG_SYS_FSL_DCFG_ADDR
CONFIG_SYS_FSL_DCSR_DDR2_ADDR
CONFIG_SYS_FSL_DCSR_DDR3_ADDR
-CONFIG_SYS_FSL_DCSR_DDR4_ADDR
CONFIG_SYS_FSL_DCSR_DDR_ADDR
CONFIG_SYS_FSL_DDR2_ADDR
CONFIG_SYS_FSL_DDR3_ADDR
CONFIG_SYS_FSL_DDR_ADDR
-CONFIG_SYS_FSL_DDR_EMU
-CONFIG_SYS_FSL_DDR_INTLV_256B
-CONFIG_SYS_FSL_DDR_MAIN_NUM_CTRLS
CONFIG_SYS_FSL_DDR_SDRAM_BASE_PHY
-CONFIG_SYS_FSL_DSPI_BE
-CONFIG_SYS_FSL_DSP_CCSRBAR_DEFAULT
-CONFIG_SYS_FSL_DSP_CCSR_DDR_ADDR
-CONFIG_SYS_FSL_DSP_CCSR_DDR_OFFSET
-CONFIG_SYS_FSL_DSP_DDR_ADDR
-CONFIG_SYS_FSL_DSP_M2_RAM_ADDR
-CONFIG_SYS_FSL_DSP_M3_RAM_ADDR
-CONFIG_SYS_FSL_ERRATUM_A008751
CONFIG_SYS_FSL_ESDHC_ADDR
-CONFIG_SYS_FSL_ESDHC_BE
-CONFIG_SYS_FSL_ESDHC_BROKEN_TIMEOUT
-CONFIG_SYS_FSL_ESDHC_HAS_DDR_MODE
-CONFIG_SYS_FSL_ESDHC_LE
-CONFIG_SYS_FSL_ESDHC_NUM
-CONFIG_SYS_FSL_ESDHC_P1010_BROKEN_SDCLK
CONFIG_SYS_FSL_FM
CONFIG_SYS_FSL_FM1_ADDR
CONFIG_SYS_FSL_FM1_DTSEC1_ADDR
CONFIG_SYS_FSL_FM2_RX3_1G_OFFSET
CONFIG_SYS_FSL_FM2_RX4_1G_OFFSET
CONFIG_SYS_FSL_FM2_RX5_1G_OFFSET
-CONFIG_SYS_FSL_FMAN_ADDR
CONFIG_SYS_FSL_GUTS_ADDR
-CONFIG_SYS_FSL_IFC_BE
-CONFIG_SYS_FSL_IFC_LE
-CONFIG_SYS_FSL_ISBC_VER
CONFIG_SYS_FSL_JR0_ADDR
CONFIG_SYS_FSL_JR0_OFFSET
CONFIG_SYS_FSL_LS1_CLK_ADDR
CONFIG_SYS_FSL_LSCH3_SERDES_ADDR
-CONFIG_SYS_FSL_MAX_NUM_OF_SEC
CONFIG_SYS_FSL_NUM_CC_PLL
-CONFIG_SYS_FSL_NUM_CC_PLLS
CONFIG_SYS_FSL_OCRAM_BASE
CONFIG_SYS_FSL_OCRAM_SIZE
-CONFIG_SYS_FSL_OTHER_DDR_NUM_CTRLS
CONFIG_SYS_FSL_PAMU_OFFSET
-CONFIG_SYS_FSL_PCIE_COMPAT
-CONFIG_SYS_FSL_PCI_VER_3_X
-CONFIG_SYS_FSL_PEX_LUT_BE
-CONFIG_SYS_FSL_PEX_LUT_LE
CONFIG_SYS_FSL_PMIC_I2C_ADDR
CONFIG_SYS_FSL_PMU_ADDR
CONFIG_SYS_FSL_PMU_CLTBENR
CONFIG_SYS_FSL_QMAN_ADDR
CONFIG_SYS_FSL_QMAN_OFFSET
-CONFIG_SYS_FSL_QMAN_V3
CONFIG_SYS_FSL_QSPI_BASE
-CONFIG_SYS_FSL_QSPI_LE
-CONFIG_SYS_FSL_RAID_ENGINE
CONFIG_SYS_FSL_RAID_ENGINE_ADDR
CONFIG_SYS_FSL_RAID_ENGINE_OFFSET
CONFIG_SYS_FSL_RCPM_ADDR
-CONFIG_SYS_FSL_RMU
CONFIG_SYS_FSL_RST_ADDR
CONFIG_SYS_FSL_SCFG_ADDR
-CONFIG_SYS_FSL_SCFG_IODSECR1_ADDR
-CONFIG_SYS_FSL_SCFG_IODSECR1_OFFSET
CONFIG_SYS_FSL_SCFG_OFFSET
-CONFIG_SYS_FSL_SCFG_PIXCLKCR_OFFSET
-CONFIG_SYS_FSL_SCFG_PIXCLK_ADDR
CONFIG_SYS_FSL_SEC_ADDR
CONFIG_SYS_FSL_SEC_IDX_OFFSET
-CONFIG_SYS_FSL_SEC_MON_BE
-CONFIG_SYS_FSL_SEC_MON_LE
CONFIG_SYS_FSL_SEC_OFFSET
CONFIG_SYS_FSL_SERDES
CONFIG_SYS_FSL_SERDES_ADDR
-CONFIG_SYS_FSL_SFP_BE
-CONFIG_SYS_FSL_SFP_LE
-CONFIG_SYS_FSL_SFP_VER_3_0
-CONFIG_SYS_FSL_SFP_VER_3_2
-CONFIG_SYS_FSL_SFP_VER_3_4
-CONFIG_SYS_FSL_SINGLE_SOURCE_CLK
CONFIG_SYS_FSL_SRDS_3
CONFIG_SYS_FSL_SRDS_4
-CONFIG_SYS_FSL_SRDS_NUM_PLLS
CONFIG_SYS_FSL_SRIO_ADDR
CONFIG_SYS_FSL_SRIO_IB_WIN_NUM
-CONFIG_SYS_FSL_SRIO_LIODN
CONFIG_SYS_FSL_SRIO_MAX_PORTS
CONFIG_SYS_FSL_SRIO_MSG_UNIT_NUM
CONFIG_SYS_FSL_SRIO_OB_WIN_NUM
CONFIG_SYS_FSL_SRIO_OFFSET
-CONFIG_SYS_FSL_SRK_LE
-CONFIG_SYS_FSL_TBCLK_DIV
CONFIG_SYS_FSL_TIMER_ADDR
-CONFIG_SYS_FSL_USB1_PHY_ENABLE
-CONFIG_SYS_FSL_USB2_PHY_ENABLE
-CONFIG_SYS_FSL_USB_DUAL_PHY_ENABLE
-CONFIG_SYS_FSL_USB_INTERNAL_UTMI_PHY
CONFIG_SYS_FSL_USDHC_NUM
-CONFIG_SYS_FSL_WDOG_BE
CONFIG_SYS_FSL_WRIOP1_ADDR
CONFIG_SYS_FSL_WRIOP1_MDIO1
CONFIG_SYS_FSL_WRIOP1_MDIO2
-CONFIG_SYS_GIC400_ADDR
-CONFIG_SYS_GP1DIR
-CONFIG_SYS_GP1ODR
-CONFIG_SYS_GP2DIR
-CONFIG_SYS_GP2ODR
CONFIG_SYS_GPIO1_EN
CONFIG_SYS_GPIO1_FUNC
CONFIG_SYS_GPIO1_LED
CONFIG_SYS_GPIO_FUNC
CONFIG_SYS_GPIO_OUT
CONFIG_SYS_GPR1
-CONFIG_SYS_HALT_BEFOR_RAM_JUMP
-CONFIG_SYS_HMI_BASE
CONFIG_SYS_HZ_CLOCK
CONFIG_SYS_I2C_BUSES
CONFIG_SYS_I2C_DVI_ADDR
CONFIG_SYS_LOW
CONFIG_SYS_LOWMEM_BASE
CONFIG_SYS_LPAE_SDRAM_BASE
-CONFIG_SYS_LS1_DDR_BLOCK1_SIZE
CONFIG_SYS_LS_MC_AIOP_IMG_MAX_LENGTH
CONFIG_SYS_LS_MC_BOOT_TIMEOUT_MS
CONFIG_SYS_LS_MC_DPC_MAX_LENGTH
CONFIG_SYS_M41T11_BASE_YEAR
CONFIG_SYS_MAIN_PWR_ON
CONFIG_SYS_MAMR
-CONFIG_SYS_MAPLE
-CONFIG_SYS_MAPPED_RAM_BASE
CONFIG_SYS_MASTER_CLOCK
CONFIG_SYS_MATRIX_EBI0CSA_VAL
CONFIG_SYS_MATRIX_EBICSA_VAL
-CONFIG_SYS_MAX_FLASH_SECT
CONFIG_SYS_MAX_I2C_BUS
CONFIG_SYS_MAX_NAND_CHIPS
CONFIG_SYS_MAX_NAND_DEVICE
CONFIG_SYS_MCKR1_VAL
CONFIG_SYS_MCKR2_VAL
CONFIG_SYS_MCKR_CSS
-CONFIG_SYS_MDCNFG_VAL
CONFIG_SYS_MDIO1_OFFSET
-CONFIG_SYS_MDREFR_VAL
-CONFIG_SYS_MEMAC_LITTLE_ENDIAN
CONFIG_SYS_MEMORY_BASE
-CONFIG_SYS_MEMORY_SIZE
CONFIG_SYS_MEM_RESERVE_SECURE
-CONFIG_SYS_MEM_SIZE
CONFIG_SYS_MFD
CONFIG_SYS_MHZ
CONFIG_SYS_MIPS_TIMER_FREQ
CONFIG_SYS_MPC83xx_DMA_OFFSET
CONFIG_SYS_MPC83xx_ESDHC_ADDR
CONFIG_SYS_MPC83xx_ESDHC_OFFSET
-CONFIG_SYS_MPC83xx_USB1_ADDR
-CONFIG_SYS_MPC83xx_USB1_OFFSET
-CONFIG_SYS_MPC85XX_NO_RESETVEC
CONFIG_SYS_MPC85xx_DMA
CONFIG_SYS_MPC85xx_DMA1_OFFSET
CONFIG_SYS_MPC85xx_DMA2_OFFSET
CONFIG_SYS_MPC8xxx_DDR_OFFSET
CONFIG_SYS_MPC8xxx_PIC_ADDR
CONFIG_SYS_MRAM_BASE
-CONFIG_SYS_MRAM_SIZE
CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST
CONFIG_SYS_NAND_AMASK
CONFIG_SYS_NAND_BASE
CONFIG_SYS_NVRAM_BASE_ADDR
CONFIG_SYS_NVRAM_SIZE
CONFIG_SYS_OBIR
-CONFIG_SYS_OHCI_SWAP_REG_ACCESS
CONFIG_SYS_OMAP_ABE_SYSCK
CONFIG_SYS_ONENAND_BASE
CONFIG_SYS_ONENAND_BLOCK_SIZE
-CONFIG_SYS_OR_TIMING_MRAM
CONFIG_SYS_OSCIN_FREQ
CONFIG_SYS_OSPR_OFFSET
CONFIG_SYS_PACNT
CONFIG_SYS_PCI2_ADDR
CONFIG_SYS_PCIE
CONFIG_SYS_PCIE1_ADDR
-CONFIG_SYS_PCIE1_BASE
CONFIG_SYS_PCIE1_CFG_BASE
CONFIG_SYS_PCIE1_CFG_SIZE
-CONFIG_SYS_PCIE1_IO_BASE
CONFIG_SYS_PCIE1_IO_PHYS
-CONFIG_SYS_PCIE1_IO_SIZE
CONFIG_SYS_PCIE1_IO_VIRT
-CONFIG_SYS_PCIE1_MEM_BASE
CONFIG_SYS_PCIE1_MEM_PHYS
-CONFIG_SYS_PCIE1_MEM_SIZE
CONFIG_SYS_PCIE1_MEM_VIRT
CONFIG_SYS_PCIE1_PHYS_ADDR
CONFIG_SYS_PCIE1_PHYS_BASE
CONFIG_SYS_PCIE1_VIRT_ADDR
CONFIG_SYS_PCIE2_ADDR
-CONFIG_SYS_PCIE2_BASE
CONFIG_SYS_PCIE2_CFG_BASE
CONFIG_SYS_PCIE2_CFG_SIZE
-CONFIG_SYS_PCIE2_IO_BASE
CONFIG_SYS_PCIE2_IO_PHYS
-CONFIG_SYS_PCIE2_IO_SIZE
CONFIG_SYS_PCIE2_IO_VIRT
-CONFIG_SYS_PCIE2_MEM_BASE
CONFIG_SYS_PCIE2_MEM_PHYS
-CONFIG_SYS_PCIE2_MEM_SIZE
CONFIG_SYS_PCIE2_MEM_VIRT
CONFIG_SYS_PCIE2_PHYS_ADDR
CONFIG_SYS_PCIE2_PHYS_BASE
CONFIG_SYS_PCIE4_MEM_VIRT
CONFIG_SYS_PCIE4_PHYS_ADDR
CONFIG_SYS_PCIE_MMAP_SIZE
-CONFIG_SYS_PCI_IO_BASE
-CONFIG_SYS_PCI_IO_PHYS
-CONFIG_SYS_PCI_IO_SIZE
-CONFIG_SYS_PCI_MAP_END
-CONFIG_SYS_PCI_MAP_START
-CONFIG_SYS_PCI_MEM_BASE
-CONFIG_SYS_PCI_MEM_PHYS
-CONFIG_SYS_PCI_MEM_SIZE
-CONFIG_SYS_PCI_MMIO_BASE
-CONFIG_SYS_PCI_MMIO_PHYS
-CONFIG_SYS_PCI_MMIO_SIZE
-CONFIG_SYS_PCI_SLV_MEM_BUS
-CONFIG_SYS_PCI_SLV_MEM_LOCAL
-CONFIG_SYS_PCI_SLV_MEM_SIZE
CONFIG_SYS_PDCNT
CONFIG_SYS_PEHLPAR
CONFIG_SYS_PIOC_PDR_VAL
CONFIG_SYS_PLL_ODR
CONFIG_SYS_PLL_SETTLING_TIME
CONFIG_SYS_PMAN
-CONFIG_SYS_PMC_BASE
-CONFIG_SYS_PMC_BASE_PHYS
CONFIG_SYS_PME_CLK
CONFIG_SYS_POST_MEMORY
CONFIG_SYS_POST_MEM_REGIONS
CONFIG_SYS_QMAN_SWP_ISDR_REG
CONFIG_SYS_QRIO_BASE
CONFIG_SYS_QRIO_BASE_PHYS
-CONFIG_SYS_RAMBOOT
CONFIG_SYS_RCAR_I2C0_BASE
CONFIG_SYS_RCAR_I2C1_BASE
CONFIG_SYS_RCAR_I2C2_BASE
CONFIG_SYS_RTC_CNT
CONFIG_SYS_RTC_SETUP
CONFIG_SYS_SATA
-CONFIG_SYS_SATA1
-CONFIG_SYS_SATA1_FLAGS
-CONFIG_SYS_SATA1_OFFSET
-CONFIG_SYS_SATA2
-CONFIG_SYS_SATA2_FLAGS
-CONFIG_SYS_SATA2_OFFSET
CONFIG_SYS_SATA_FAT_BOOT_PARTITION
CONFIG_SYS_SBFHDR_DATA_OFFSET
CONFIG_SYS_SBFHDR_SIZE
CONFIG_SYS_SDRAM_BASE0
CONFIG_SYS_SDRAM_BASE1
CONFIG_SYS_SDRAM_BASE2
-CONFIG_SYS_SDRAM_CFG
CONFIG_SYS_SDRAM_CFG1
CONFIG_SYS_SDRAM_CFG2
CONFIG_SYS_SDRAM_CTRL
CONFIG_SYS_SMC0_MODE0_VAL
CONFIG_SYS_SMC0_PULSE0_VAL
CONFIG_SYS_SMC0_SETUP0_VAL
-CONFIG_SYS_SPD_BUS_NUM
CONFIG_SYS_SPI_ARGS_OFFS
CONFIG_SYS_SPI_ARGS_SIZE
CONFIG_SYS_SPI_BASE
CONFIG_SYS_TIMER_RATE
CONFIG_SYS_TMPVIRT
CONFIG_SYS_TSEC1_OFFSET
-CONFIG_SYS_TSEC2_OFFSET
-CONFIG_SYS_TSEC3_OFFSET
CONFIG_SYS_TX_ETH_BUFFER
CONFIG_SYS_UART2_ALT3_GPIO
CONFIG_SYS_UART_PORT
CONFIG_SYS_UEC2_RX_CLK
CONFIG_SYS_UEC2_TX_CLK
CONFIG_SYS_UEC2_UCC_NUM
-CONFIG_SYS_ULB_CLK
-CONFIG_SYS_UNIFY_CACHE
-CONFIG_SYS_USB_FAT_BOOT_PARTITION
-CONFIG_SYS_USB_OHCI_BOARD_INIT
-CONFIG_SYS_USB_OHCI_CPU_INIT
-CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS
CONFIG_SYS_USB_OHCI_REGS_BASE
-CONFIG_SYS_USB_OHCI_SLOT_NAME
-CONFIG_SYS_USE_NAND
CONFIG_SYS_VCXK_ACKNOWLEDGE_DDR
CONFIG_SYS_VCXK_ACKNOWLEDGE_PIN
CONFIG_SYS_VCXK_ACKNOWLEDGE_PORT
CONFIG_TEGRA_CLOCK_SCALING
CONFIG_TEGRA_ENABLE_UARTA
CONFIG_TEGRA_ENABLE_UARTD
-CONFIG_TEGRA_GPU
CONFIG_TEGRA_LP0
CONFIG_TEGRA_PMU
CONFIG_TEGRA_SLINK_CTRLS
CONFIG_TESTPIN_MASK
CONFIG_TESTPIN_REG
CONFIG_THOR_RESET_OFF
-CONFIG_THUNDERX
-CONFIG_TIZEN
CONFIG_TMU_TIMER
CONFIG_TPM_TIS_BASE_ADDRESS
CONFIG_TPS6586X_POWER
-CONFIG_TRATS
CONFIG_TSEC
CONFIG_TSEC1
CONFIG_TSEC1_NAME
CONFIG_USBD_PRODUCT_NAME
CONFIG_USBD_VENDORID
CONFIG_USBNET_DEV_ADDR
-CONFIG_USB_ATMEL
-CONFIG_USB_ATMEL_CLK_SEL_PLLB
-CONFIG_USB_ATMEL_CLK_SEL_UPLL
CONFIG_USB_BOOTING
CONFIG_USB_DEVICE
-CONFIG_USB_EHCI_EXYNOS
-CONFIG_USB_EHCI_TXFIFO_THRESH
CONFIG_USB_EXT2_BOOT
CONFIG_USB_FAT_BOOT
CONFIG_USB_GADGET_AT91
-CONFIG_USB_GADGET_DWC2_OTG_PHY
CONFIG_USB_ISP1301_I2C_ADDR
-CONFIG_USB_MAX_CONTROLLER_COUNT
-CONFIG_USB_OHCI_LPC32XX
-CONFIG_USB_OHCI_NEW
CONFIG_USB_TTY
-CONFIG_USB_XHCI_EXYNOS
-CONFIG_USE_ONENAND_BOARD_INIT
CONFIG_U_BOOT_HDR_SIZE
CONFIG_VAR_SIZE_SPL
CONFIG_VERY_BIG_RAM
CONFIG_X86_MRC_ADDR
CONFIG_X86_REFCODE_ADDR
CONFIG_X86_REFCODE_RUN_ADDR
-CONFIG_XTFPGA