MIPS: Add CONFIG_SKIP_LOWLEVEL_INIT

[platform/kernel/u-boot.git] / post / lib_ppc / andi.c

diff --git a/post/lib_ppc/andi.c b/post/lib_ppc/andi.c
index 7ddf2ab..52ec7c4 100644 (file)
--- a/post/lib_ppc/andi.c
+++ b/post/lib_ppc/andi.c
@@ -32,12 +32,10 @@
  * different sets of operand registers and result registers.
  */
 
-#ifdef CONFIG_POST
-
 #include <post.h>
 #include "cpu_asm.h"
 
-#if CONFIG_POST & CFG_POST_CPU
+#if CONFIG_POST & CONFIG_SYS_POST_CPU
 
 extern void cpu_post_exec_21 (ulong *code, ulong *cr, ulong *res, ulong op);
 extern ulong cpu_post_makecr (long v);
@@ -51,13 +49,13 @@ static struct cpu_post_andi_s
 } cpu_post_andi_table[] =
 {
     {
-       OP_ANDI_,
+       OP_ANDI_,
        0x80008000,
        0xffff,
        0x00008000
     },
     {
-       OP_ANDIS_,
+       OP_ANDIS_,
        0x80008000,
        0xffff,
        0x80000000
@@ -81,7 +79,7 @@ int cpu_post_test_andi (void)
            unsigned int reg0 = (reg + 0) % 32;
            unsigned int reg1 = (reg + 1) % 32;
            unsigned int stk = reg < 16 ? 31 : 15;
-           unsigned long codecr[] =
+           unsigned long codecr[] =
            {
                ASM_STW(stk, 1, -4),
                ASM_ADDI(stk, 1, -16),
@@ -114,10 +112,9 @@ int cpu_post_test_andi (void)
     }
 
     if (flag)
-       enable_interrupts();
+       enable_interrupts();
 
     return ret;
 }
 
 #endif
-#endif