{ "restore", F3(2, 0x3d, 1), F3(~2, ~0x3d, ~1), "1,i,d", 0, 0, 0, v6 },
{ "restore", F3(2, 0x3d, 1), F3(~2, ~0x3d, ~1)|RD_G0|RS1_G0|SIMM13(~0), "", 0, 0, 0, v6 }, /* restore %g0,0,%g0 */
-{ "rett", F3(2, 0x39, 0), F3(~2, ~0x39, ~0)|RD_G0|ASI(~0), "1+2", F_UNBR|F_DELAYED, 0, 0, v6 }, /* rett rs1+rs2 */
-{ "rett", F3(2, 0x39, 0), F3(~2, ~0x39, ~0)|RD_G0|ASI_RS2(~0), "1", F_UNBR|F_DELAYED, 0, 0, v6 }, /* rett rs1,%g0 */
-{ "rett", F3(2, 0x39, 1), F3(~2, ~0x39, ~1)|RD_G0, "1+i", F_UNBR|F_DELAYED, 0, 0, v6 }, /* rett rs1+X */
-{ "rett", F3(2, 0x39, 1), F3(~2, ~0x39, ~1)|RD_G0, "i+1", F_UNBR|F_DELAYED, 0, 0, v6 }, /* rett X+rs1 */
-{ "rett", F3(2, 0x39, 1), F3(~2, ~0x39, ~1)|RD_G0|RS1_G0, "i", F_UNBR|F_DELAYED, 0, 0, v6 }, /* rett X+rs1 */
-{ "rett", F3(2, 0x39, 1), F3(~2, ~0x39, ~1)|RD_G0|RS1_G0, "i", F_UNBR|F_DELAYED, 0, 0, v6 }, /* rett X */
-{ "rett", F3(2, 0x39, 1), F3(~2, ~0x39, ~1)|RD_G0|SIMM13(~0), "1", F_UNBR|F_DELAYED, 0, 0, v6 }, /* rett rs1+0 */
+{ "rett", F3(2, 0x39, 0), F3(~2, ~0x39, ~0)|RD_G0|ASI(~0), "1+2", F_UNBR|F_DELAYED, 0, 0, v6notv9 }, /* rett rs1+rs2 */
+{ "rett", F3(2, 0x39, 0), F3(~2, ~0x39, ~0)|RD_G0|ASI_RS2(~0), "1", F_UNBR|F_DELAYED, 0, 0, v6notv9 }, /* rett rs1,%g0 */
+{ "rett", F3(2, 0x39, 1), F3(~2, ~0x39, ~1)|RD_G0, "1+i", F_UNBR|F_DELAYED, 0, 0, v6notv9 }, /* rett rs1+X */
+{ "rett", F3(2, 0x39, 1), F3(~2, ~0x39, ~1)|RD_G0, "i+1", F_UNBR|F_DELAYED, 0, 0, v6notv9 }, /* rett X+rs1 */
+{ "rett", F3(2, 0x39, 1), F3(~2, ~0x39, ~1)|RD_G0|RS1_G0, "i", F_UNBR|F_DELAYED, 0, 0, v6notv9 }, /* rett X+rs1 */
+{ "rett", F3(2, 0x39, 1), F3(~2, ~0x39, ~1)|RD_G0|RS1_G0, "i", F_UNBR|F_DELAYED, 0, 0, v6notv9 }, /* rett X */
+{ "rett", F3(2, 0x39, 1), F3(~2, ~0x39, ~1)|RD_G0|SIMM13(~0), "1", F_UNBR|F_DELAYED, 0, 0, v6notv9 }, /* rett rs1+0 */
{ "save", F3(2, 0x3c, 0), F3(~2, ~0x3c, ~0)|ASI(~0), "1,2,d", 0, 0, 0, v6 },
{ "save", F3(2, 0x3c, 1), F3(~2, ~0x3c, ~1), "1,i,d", 0, 0, 0, v6 },
{ 0xE3, "#ASI_TWINX_S", v9c },
{ 0xEA, "#ASI_TWINX_PL", v9c },
{ 0xEB, "#ASI_TWINX_SL", v9c },
+ /* These are ASIs from UA2005, UA2007, OSA2011, & OSA 2015 */
+ { 0x12, "#ASI_MAIUP", v9m },
+ { 0x13, "#ASI_MAIUS", v9m },
+ { 0x14, "#ASI_REAL", v9c },
+ { 0x15, "#ASI_REAL_IO", v9c },
+ { 0x1c, "#ASI_REAL_L", v9c },
+ { 0x1d, "#ASI_REAL_IO_L", v9c },
+ { 0x30, "#ASI_AIPP", v9d },
+ { 0x31, "#ASI_AIPS", v9d },
+ { 0x36, "#ASI_AIPN", v9d },
+ { 0x38, "#ASI_AIPP_L", v9d },
+ { 0x39, "#ASI_AIPS_L", v9d },
+ { 0x3e, "#ASI_AIPN_L", v9d },
+ { 0x42, "#ASI_INST_MASK_REG", v9d },
+ { 0x42, "#ASI_LSU_DIAG_REG", v9d },
+ { 0x43, "#ASI_ERROR_INJECT_REG", v9d },
+ { 0x48, "#ASI_IRF_ECC_REG", v9d },
+ { 0x49, "#ASI_FRF_ECC_REG", v9d },
+ { 0x4e, "#ASI_SPARC_PWR_MGMT", v9d },
+ { 0x4f, "#ASI_HYP_SCRATCHPAD", v9c },
+ { 0x59, "#ASI_SCRATCHPAD_ACCESS", v9d },
+ { 0x5a, "#ASI_TICK_ACCESS", v9d },
+ { 0x5b, "#ASI_TSA_ACCESS", v9d },
+ { 0xb0, "#ASI_PIC", v9e },
+ { 0xf2, "#ASI_STBI_PM", v9e },
+ { 0xf3, "#ASI_STBI_SM", v9e },
+ { 0xfa, "#ASI_STBI_PLM", v9e },
+ { 0xfb, "#ASI_STBI_SLM", v9e },
{ 0, 0, 0 }
};