/* Disassembler code for Renesas RX.
- Copyright (C) 2008-2015 Free Software Foundation, Inc.
+ Copyright (C) 2008-2019 Free Software Foundation, Inc.
Contributed by Red Hat.
Written by DJ Delorie.
#include "dis-asm.h"
#include "opcode/rx.h"
+#include <setjmp.h>
+
typedef struct
{
bfd_vma pc;
disassemble_info * dis;
} RX_Data;
+struct private
+{
+ OPCODES_SIGJMP_BUF bailout;
+};
+
static int
rx_get_byte (void * vdata)
{
bfd_byte buf[1];
RX_Data *rx_data = (RX_Data *) vdata;
+ int status;
- rx_data->dis->read_memory_func (rx_data->pc,
- buf,
- 1,
- rx_data->dis);
+ status = rx_data->dis->read_memory_func (rx_data->pc,
+ buf,
+ 1,
+ rx_data->dis);
+ if (status != 0)
+ {
+ struct private *priv = (struct private *) rx_data->dis->private_data;
+
+ rx_data->dis->memory_error_func (status, rx_data->pc,
+ rx_data->dis);
+ OPCODES_SIGLONGJMP (priv->bailout, 1);
+ }
rx_data->pc ++;
return buf[0];
}
-static char const * size_names[] =
+static char const * size_names[RX_MAX_SIZE] =
{
- "", ".b", ".ub", ".b", ".w", ".uw", ".w", ".a", ".l"
+ "", ".b", ".ub", ".b", ".w", ".uw", ".w", ".a", ".l", "", "<error>"
};
-static char const * opsize_names[] =
+static char const * opsize_names[RX_MAX_SIZE] =
{
- "", ".b", ".b", ".b", ".w", ".w", ".w", ".a", ".l"
+ "", ".b", ".b", ".b", ".w", ".w", ".w", ".a", ".l", ".d", "<error>"
};
static char const * register_names[] =
"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
"r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
/* control register */
- "psw", "pc", "usp", "fpsw", "", "", "", "wr",
- "bpsw", "bpc", "isp", "fintv", "intb", "", "", "",
- "pbp", "pben", "", "", "", "", "", "",
- "bbpsw", "bbpc", "", "", "", "", "", ""
+ "psw", "pc", "usp", "fpsw", NULL, NULL, NULL, NULL,
+ "bpsw", "bpc", "isp", "fintv", "intb", "extb", NULL, NULL,
+ "a0", "a1", NULL, NULL, NULL, NULL, NULL, NULL,
+ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
};
static char const * condition_names[] =
{
/* condition codes */
"eq", "ne", "c", "nc", "gtu", "leu", "pz", "n",
- "ge", "lt", "gt", "le", "o", "no", "always", "never"
+ "ge", "lt", "gt", "le", "o", "no", "<invalid>", "<invalid>"
};
static const char * flag_names[] =
"", "", "", "", "", "", "", "",
};
+static const char * double_register_names[] =
+{
+ "dr0", "dr1", "dr2", "dr3", "dr4", "dr5", "dr6", "dr7",
+ "dr8", "dr9", "dr10", "dr11", "dr12", "dr13", "dr14", "dr15",
+};
+
+static const char * double_register_high_names[] =
+{
+ "drh0", "drh1", "drh2", "drh3", "drh4", "drh5", "drh6", "drh7",
+ "drh8", "drh9", "drh10", "drh11", "drh12", "drh13", "drh14", "drh15",
+};
+
+static const char * double_register_low_names[] =
+{
+ "drl0", "drl1", "drl2", "drl3", "drl4", "drl5", "drl6", "drl7",
+ "drl8", "drl9", "drl10", "drl11", "drl12", "drl13", "drl14", "drl15",
+};
+
+static const char * double_control_register_names[] =
+{
+ "dpsw", "dcmr", "decnt", "depc",
+};
+
+static const char * double_condition_names[] =
+{
+ "", "un", "eq", "", "lt", "", "le",
+};
+
int
print_insn_rx (bfd_vma addr, disassemble_info * dis)
{
RX_Data rx_data;
RX_Opcode_Decoded opcode;
const char * s;
+ struct private priv;
+ dis->private_data = (PTR) &priv;
rx_data.pc = addr;
rx_data.dis = dis;
+ if (OPCODES_SIGSETJMP (priv.bailout) != 0)
+ {
+ /* Error return. */
+ return -1;
+ }
+
rv = rx_decode_opcode (addr, &opcode, rx_get_byte, &rx_data);
dis->bytes_per_line = 10;
#define PS (dis->stream)
#define PC(c) PR (PS, "%c", c)
+ /* Detect illegal instructions. */
+ if (opcode.op[0].size == RX_Bad_Size
+ || register_names [opcode.op[0].reg] == NULL
+ || register_names [opcode.op[1].reg] == NULL
+ || register_names [opcode.op[2].reg] == NULL)
+ {
+ bfd_byte buf[10];
+ int i;
+
+ PR (PS, ".byte ");
+ rx_data.dis->read_memory_func (rx_data.pc - rv, buf, rv, rx_data.dis);
+
+ for (i = 0 ; i < rv; i++)
+ PR (PS, "0x%02x ", buf[i]);
+ return rv;
+ }
+
for (s = opcode.syntax; *s; s++)
{
if (*s != '%')
PR (PS, "%s", opsize_names[opcode.size]);
break;
+ case 'b':
+ s ++;
+ if (*s == 'f') {
+ int imm = opcode.op[2].addend;
+ int slsb, dlsb, width;
+ dlsb = (imm >> 5) & 0x1f;
+ slsb = (imm & 0x1f);
+ slsb = (slsb >= 0x10?(slsb ^ 0x1f) + 1:slsb);
+ slsb = dlsb - slsb;
+ slsb = (slsb < 0?-slsb:slsb);
+ width = ((imm >> 10) & 0x1f) - dlsb;
+ PR (PS, "#%d, #%d, #%d, %s, %s",
+ slsb, dlsb, width,
+ register_names[opcode.op[1].reg],
+ register_names[opcode.op[0].reg]);
+ }
+ break;
case '0':
case '1':
case '2':
oper = opcode.op + *s - '0';
if (do_size)
{
- if (oper->type == RX_Operand_Indirect)
+ if (oper->type == RX_Operand_Indirect || oper->type == RX_Operand_Zero_Indirect)
PR (PS, "%s", size_names[oper->size]);
}
else
PR (PS, "%s", register_names[oper->reg]);
break;
case RX_Operand_Indirect:
- if (oper->addend)
- PR (PS, "%d[%s]", oper->addend, register_names[oper->reg]);
- else
- PR (PS, "[%s]", register_names[oper->reg]);
+ PR (PS, "%d[%s]", oper->addend, register_names[oper->reg]);
+ break;
+ case RX_Operand_Zero_Indirect:
+ PR (PS, "[%s]", register_names[oper->reg]);
break;
case RX_Operand_Postinc:
PR (PS, "[%s+]", register_names[oper->reg]);
case RX_Operand_Flag:
PR (PS, "%s", flag_names[oper->reg]);
break;
+ case RX_Operand_DoubleReg:
+ PR (PS, "%s", double_register_names[oper->reg]);
+ break;
+ case RX_Operand_DoubleRegH:
+ PR (PS, "%s", double_register_high_names[oper->reg]);
+ break;
+ case RX_Operand_DoubleRegL:
+ PR (PS, "%s", double_register_low_names[oper->reg]);
+ break;
+ case RX_Operand_DoubleCReg:
+ PR (PS, "%s", double_control_register_names[oper->reg]);
+ break;
+ case RX_Operand_DoubleCond:
+ PR (PS, "%s", double_condition_names[oper->reg]);
+ break;
default:
PR (PS, "[???]");
break;
projects / external / binutils.git / blobdiff