/* -*- c -*- */
+/* Copyright (C) 2012-2014 Free Software Foundation, Inc.
+ Contributed by Red Hat.
+ Written by DJ Delorie.
+
+ This file is part of the GNU opcodes library.
+
+ This library is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3, or (at your option)
+ any later version.
+
+ It is distributed in the hope that it will be useful, but WITHOUT
+ ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+ or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
+ License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, write to the Free Software
+ Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
+ MA 02110-1301, USA. */
+
#include "sysdep.h"
#include <stdio.h>
#include <stdlib.h>
/*----------------------------------------------------------------------*/
-/** 0000 1111 add %0, %e1%!1 */
+/** 0000 1111 add %0, %e!1 */
ID(add); DR(A); SM(None, IMMU(2)); Fzac;
-/** 0000 1101 add %0, %e1%1 */
+/** 0000 1101 add %0, %e1 */
ID(add); DR(A); SM(HL, 0); Fzac;
-/** 0110 0001 1000 000 add %0, %e1%1 */
+/** 0110 0001 1000 000 add %0, %e1 */
ID(add); DR(A); SM2(HL, B, 0); Fzac;
-/** 0000 1110 add %0, %e1%1 */
+/** 0000 1110 add %0, %e1 */
ID(add); DR(A); SM(HL, IMMU(1)); Fzac;
-
-/** 0110 0001 1000 0010 add %0, %e1%1 */
+
+/** 0110 0001 1000 0010 add %0, %e1 */
ID(add); DR(A); SM2(HL, C, 0); Fzac;
/** 0000 1100 add %0, #%1 */
/*----------------------------------------------------------------------*/
-/** 0001 1111 addc %0, %e1%!1 */
+/** 0001 1111 addc %0, %e!1 */
ID(addc); DR(A); SM(None, IMMU(2)); Fzac;
-/** 0001 1101 addc %0, %e1%1 */
+/** 0001 1101 addc %0, %e1 */
ID(addc); DR(A); SM(HL, 0); Fzac;
-/** 0110 0001 1001 0000 addc %0, %e1%1 */
+/** 0110 0001 1001 0000 addc %0, %e1 */
ID(addc); DR(A); SM2(HL, B, 0); Fzac;
-/** 0110 0001 1001 0010 addc %0, %e1%1 */
+/** 0110 0001 1001 0010 addc %0, %e1 */
ID(addc); DR(A); SM2(HL, C, 0); Fzac;
-/** 0001 1110 addc %0, %e1%1 */
+/** 0001 1110 addc %0, %e1 */
ID(addc); DR(A); SM(HL, IMMU(1)); Fzac;
/** 0001 1100 addc %0, #%1 */
/*----------------------------------------------------------------------*/
-/** 0000 0010 addw %0, %e1%!1 */
+/** 0000 0010 addw %0, %e!1 */
ID(add); W(); DR(AX); SM(None, IMMU(2)); Fzac;
-/** 0110 0001 0000 1001 addw %0, %e1%1 */
+/** 0110 0001 0000 1001 addw %0, %e1 */
ID(add); W(); DR(AX); SM(HL, IMMU(1)); Fzac;
/** 0000 0100 addw %0, #%1 */
/*----------------------------------------------------------------------*/
-/** 0101 1111 and %0, %e1%!1 */
+/** 0101 1111 and %0, %e!1 */
ID(and); DR(A); SM(None, IMMU(2)); Fz;
-/** 0101 1101 and %0, %e1%1 */
+/** 0101 1101 and %0, %e1 */
ID(and); DR(A); SM(HL, 0); Fz;
-/** 0110 0001 1101 0000 and %0, %e1%1 */
+/** 0110 0001 1101 0000 and %0, %e1 */
ID(and); DR(A); SM2(HL, B, 0); Fz;
-/** 0101 1110 and %0, %e1%1 */
+/** 0101 1110 and %0, %e1 */
ID(and); DR(A); SM(HL, IMMU(1)); Fz;
-/** 0110 0001 1101 0010 and %0, %e1%1 */
+/** 0110 0001 1101 0010 and %0, %e1 */
ID(and); DR(A); SM2(HL, C, 0); Fz;
/** 0101 1100 and %0, #%1 */
/*----------------------------------------------------------------------*/
-/** 0111 0001 1bit 0101 and1 cy, %e1%1 */
+/** 0111 0001 1bit 0101 and1 cy, %e1 */
ID(and); DCY(); SM(HL, 0); SB(bit);
/** 0111 0001 1bit 1101 and1 cy, %1 */
/*----------------------------------------------------------------------*/
-/** 0011 0001 1bit 0101 bf %e1%1, $%a0 */
+/** 0011 0001 1bit 0101 bf %e1, $%a0 */
ID(branch_cond); DC(pc+IMMS(1)+3); SM(HL,0); SB(bit); COND(F);
/** 0011 0001 0bit 0101 bf %1, $%a0 */
/*----------------------------------------------------------------------*/
-/** 0011 0001 1bit 0011 bt %e1%1, $%a0 */
+/** 0011 0001 1bit 0011 bt %e1, $%a0 */
ID(branch_cond); DC(pc+IMMS(1)+3); SM(HL,0); SB(bit); COND(T);
/** 0011 0001 0bit 0011 bt %1, $%a0 */
/*----------------------------------------------------------------------*/
-/** 0011 0001 1bit 0001 btclr %e1%1, $%a0 */
+/** 0011 0001 1bit 0001 btclr %e1, $%a0 */
ID(branch_cond_clear); DC(pc+IMMS(1)+3); SM(HL,0); SB(bit); COND(T);
/** 0011 0001 0bit 0001 btclr %1, $%a0 */
/*----------------------------------------------------------------------*/
-/** 0111 0001 0bit 1000 clr1 %e0%!0 */
+/** 0111 0001 0bit 1000 clr1 %e!0 */
ID(mov); DM(None, IMMU(2)); DB(bit); SC(0);
-/** 0111 0001 1bit 0011 clr1 %e0%0 */
+/** 0111 0001 1bit 0011 clr1 %e0 */
ID(mov); DM(HL, 0); DB(bit); SC(0);
/** 0111 0001 1bit 1011 clr1 %0 */
/*----------------------------------------------------------------------*/
-/** 1111 0101 clrb %e0%!0 */
+/** 1111 0101 clrb %e!0 */
ID(mov); DM(None, IMMU(2)); SC(0);
/** 1111 00rg clrb %0 */
/*----------------------------------------------------------------------*/
-/** 0100 0000 cmp %e0%!0, #%1 */
+/** 0100 0000 cmp %e!0, #%1 */
ID(cmp); DM(None, IMMU(2)); SC(IMMU(1)); Fzac;
/** 0100 1010 cmp %0, #%1 */
ID(cmp); DM(None, SADDR); SC(IMMU(1)); Fzac;
-/** 0100 1111 cmp %0, %e1%!1 */
+/** 0100 1111 cmp %0, %e!1 */
ID(cmp); DR(A); SM(None, IMMU(2)); Fzac;
-/** 0100 1101 cmp %0, %e1%1 */
+/** 0100 1101 cmp %0, %e1 */
ID(cmp); DR(A); SM(HL, 0); Fzac;
-/** 0110 0001 1100 0000 cmp %0, %e1%1 */
+/** 0110 0001 1100 0000 cmp %0, %e1 */
ID(cmp); DR(A); SM2(HL, B, 0); Fzac;
-/** 0110 0001 1100 0010 cmp %0, %e1%1 */
+/** 0110 0001 1100 0010 cmp %0, %e1 */
ID(cmp); DR(A); SM2(HL, C, 0); Fzac;
-/** 0100 1110 cmp %0, %e1%1 */
+/** 0100 1110 cmp %0, %e1 */
ID(cmp); DR(A); SM(HL, IMMU(1)); Fzac;
/** 0100 1100 cmp %0, #%1 */
/*----------------------------------------------------------------------*/
-/** 1101 0101 cmp0 %e0%!0 */
+/** 1101 0101 cmp0 %e!0 */
ID(cmp); DM(None, IMMU(2)); SC(0); Fzac;
/** 1101 00rg cmp0 %0 */
/*----------------------------------------------------------------------*/
-/** 0110 0001 1101 1110 cmps %0, %e1%1 */
+/** 0110 0001 1101 1110 cmps %0, %e1 */
ID(cmp); DR(X); SM(HL, IMMU(1)); Fzac;
/*----------------------------------------------------------------------*/
-/** 0100 0010 cmpw %0, %e1%!1 */
+/** 0100 0010 cmpw %0, %e!1 */
ID(cmp); W(); DR(AX); SM(None, IMMU(2)); Fzac;
-/** 0110 0001 0100 1001 cmpw %0, %e1%1 */
+/** 0110 0001 0100 1001 cmpw %0, %e1 */
ID(cmp); W(); DR(AX); SM(HL, IMMU(1)); Fzac;
/** 0100 0100 cmpw %0, #%1 */
/*----------------------------------------------------------------------*/
-/** 1011 0000 dec %e0%!0 */
+/** 1011 0000 dec %e!0 */
ID(sub); DM(None, IMMU(2)); SC(1); Fza;
-/** 0110 0001 0110 1001 dec %e0%0 */
+/** 0110 0001 0110 1001 dec %e0 */
ID(sub); DM(HL, IMMU(1)); SC(1); Fza;
/** 1001 0reg dec %0 */
/*----------------------------------------------------------------------*/
-/** 1011 0010 decw %e0%!0 */
+/** 1011 0010 decw %e!0 */
ID(sub); W(); DM(None, IMMU(2)); SC(1);
-/** 0110 0001 1000 1001 decw %e0%0 */
+/** 0110 0001 1000 1001 decw %e0 */
ID(sub); W(); DM(HL, IMMU(1)); SC(1);
/** 1011 0rg1 decw %0 */
/*----------------------------------------------------------------------*/
-/** 1010 0000 inc %e0%!0 */
+/** 1010 0000 inc %e!0 */
ID(add); DM(None, IMMU(2)); SC(1); Fza;
-/** 0110 0001 0101 1001 inc %e0%0 */
+/** 0110 0001 0101 1001 inc %e0 */
ID(add); DM(HL, IMMU(1)); SC(1); Fza;
/** 1000 0reg inc %0 */
/*----------------------------------------------------------------------*/
-/** 1010 0010 incw %e0%!0 */
+/** 1010 0010 incw %e!0 */
ID(add); W(); DM(None, IMMU(2)); SC(1);
-/** 0110 0001 0111 1001 incw %e0%0 */
+/** 0110 0001 0111 1001 incw %e0 */
ID(add); W(); DM(HL, IMMU(1)); SC(1);
/** 1010 0rg1 incw %0 */
/*----------------------------------------------------------------------*/
-/** 1100 1111 mov %e0%!0, #%1 */
+/** 1100 1111 mov %e!0, #%1 */
ID(mov); DM(None, IMMU(2)); SC(IMMU(1));
-/** 1001 1111 mov %e0%!0, %1 */
+/** 1001 1111 mov %e!0, %1 */
ID(mov); DM(None, IMMU(2)); SR(A);
-/** 1001 1001 mov %e0%0,%1 */
+/** 1001 1001 mov %e0,%1 */
ID(mov); DM(DE, 0); SR(A);
-/** 1100 1010 mov %e0%0, #%1 */
+/** 1100 1010 mov %e0, #%1 */
ID(mov); DM(DE, IMMU(1)); SC(IMMU(1));
-/** 1001 1010 mov %e0%0, %1 */
+/** 1001 1010 mov %e0, %1 */
ID(mov); DM(DE, IMMU(1)); SR(A);
-/** 1001 1011 mov %e0%0,%1 */
+/** 1001 1011 mov %e0,%1 */
ID(mov); DM(HL, 0); SR(A);
-/** 0110 0001 1101 1001 mov %e0%0, %1 */
+/** 0110 0001 1101 1001 mov %e0, %1 */
ID(mov); DM2(HL, B, 0); SR(A);
-/** 1100 1100 mov %e0%0, #%1 */
+/** 1100 1100 mov %e0, #%1 */
ID(mov); DM(HL, IMMU(1)); SC(IMMU(1));
-/** 1001 1100 mov %e0%0, %1 */
+/** 1001 1100 mov %e0, %1 */
ID(mov); DM(HL, IMMU(1)); SR(A);
-/** 0110 0001 1111 1001 mov %e0%0, %1 */
+/** 0110 0001 1111 1001 mov %e0, %1 */
ID(mov); DM2(HL, C, 0); SR(A);
/** 1100 1000 mov %0, #%1 */
/** 1001 1000 mov %0, %1 */
ID(mov); DM(SP, IMMU(1)); SR(A);
-/** 1000 1111 mov %0, %e1%!1 */
+/** 1000 1111 mov %0, %e!1 */
ID(mov); DR(A); SM(None, IMMU(2));
-/** 1000 1001 mov %0, %e1%1 */
+/** 1000 1001 mov %0, %e1 */
ID(mov); DR(A); SM(DE, 0);
-/** 1000 1010 mov %0, %e1%1 */
+/** 1000 1010 mov %0, %e1 */
ID(mov); DR(A); SM(DE, IMMU(1));
-/** 1000 1011 mov %0, %e1%1 */
+/** 1000 1011 mov %0, %e1 */
ID(mov); DR(A); SM(HL, 0);
-/** 1000 1100 mov %0, %e1%1 */
+/** 1000 1100 mov %0, %e1 */
ID(mov); DR(A); SM(HL, IMMU(1));
-/** 0110 0001 1100 1001 mov %0, %e1%1 */
+/** 0110 0001 1100 1001 mov %0, %e1 */
ID(mov); DR(A); SM2(HL, B, 0);
-/** 0110 0001 1110 1001 mov %0, %e1%1 */
+/** 0110 0001 1110 1001 mov %0, %e1 */
ID(mov); DR(A); SM2(HL, C, 0);
-/** 1000 1000 mov %0, %e1%1 */
+/** 1000 1000 mov %0, %e1 */
ID(mov); DR(A); SM(SP, IMMU(1));
/** 0101 0reg mov %0, #%1 */
/** 1000 1110 1111 1101 mov %0, %1 */
ID(mov); DR(A); SR(ES);
-/** 0000 1001 mov %0, %e1%1 */
+/** 0000 1001 mov %0, %e1 */
ID(mov); DR(A); SM(B, IMMU(2));
-/** 0100 1001 mov %0, %e1%1 */
+/** 0100 1001 mov %0, %e1 */
ID(mov); DR(A); SM(BC, IMMU(2));
-/** 0010 1001 mov %0, %e1%1 */
+/** 0010 1001 mov %0, %e1 */
ID(mov); DR(A); SM(C, IMMU(2));
/** 1000 1110 mov %0, %s1 */
/** 1000 1101 mov %0, %1 */
ID(mov); DR(A); SM(None, SADDR);
-/** 1110 1001 mov %0, %e1%!1 */
+/** 1110 1001 mov %0, %e!1 */
ID(mov); DR(B); SM(None, IMMU(2));
/** 0111 0rba mov %0, %1 */
/** 1110 1000 mov %0, %1 */
ID(mov); DR(B); SM(None, SADDR);
-/** 1111 1001 mov %0, %e1%!1 */
+/** 1111 1001 mov %0, %e!1 */
ID(mov); DR(C); SM(None, IMMU(2));
/** 1111 1000 mov %0, %1 */
ID(mov); DR(C); SM(None, SADDR);
-/** 1101 1001 mov %0, %e1%!1 */
+/** 1101 1001 mov %0, %e!1 */
ID(mov); DR(X); SM(None, IMMU(2));
/** 1101 1000 mov %0, %1 */
/** 0110 0001 1011 1000 mov %0, %1 */
ID(mov); DR(ES); SM(None, SADDR);
-/** 0001 1001 mov %e0%0, #%1 */
+/** 0001 1001 mov %e0, #%1 */
ID(mov); DM(B, IMMU(2)); SC(IMMU(1));
-/** 0001 1000 mov %e0%0, %1 */
+/** 0001 1000 mov %e0, %1 */
ID(mov); DM(B, IMMU(2)); SR(A);
-/** 0011 1001 mov %e0%0, #%1 */
+/** 0011 1001 mov %e0, #%1 */
ID(mov); DM(BC, IMMU(2)); SC(IMMU(1));
-/** 0100 1000 mov %e0%0, %1 */
+/** 0100 1000 mov %e0, %1 */
ID(mov); DM(BC, IMMU(2)); SR(A);
-/** 0011 1000 mov %e0%0, #%1 */
+/** 0011 1000 mov %e0, #%1 */
ID(mov); DM(C, IMMU(2)); SC(IMMU(1));
-/** 0010 1000 mov %e0%0, %1 */
+/** 0010 1000 mov %e0, %1 */
ID(mov); DM(C, IMMU(2)); SR(A);
/** 1100 1101 mov %0, #%1 */
rl78->syntax = "divhu"; ID(divhu);
break;
case 0x04:
- rl78->syntax = "divwu"; ID(divwu);
+ rl78->syntax = "divwu <old-encoding>"; ID(divwu);
break;
case 0x05:
rl78->syntax = "machu"; ID(machu);
case 0x06:
rl78->syntax = "mach"; ID(mach);
break;
+ case 0x0b:
+ rl78->syntax = "divwu"; ID(divwu);
+ break;
}
/** 1001 1110 mov %0, %1 */
/*----------------------------------------------------------------------*/
-/** 0111 0001 1bit 0001 mov1 %e0%0, cy */
+/** 0111 0001 1bit 0001 mov1 %e0, cy */
ID(mov); DM(HL, 0); DB(bit); SCY();
-/** 0111 0001 1bit 1001 mov1 %e0%0, cy */
+/** 0111 0001 1bit 1001 mov1 %e0, cy */
ID(mov); DR(A); DB(bit); SCY();
-/** 0111 0001 1bit 0100 mov1 cy, %e1%1 */
+/** 0111 0001 1bit 0100 mov1 cy, %e1 */
ID(mov); DCY(); SM(HL, 0); SB(bit);
-/** 0111 0001 1bit 1100 mov1 cy, %e1%1 */
+/** 0111 0001 1bit 1100 mov1 cy, %e1 */
ID(mov); DCY(); SR(A); SB(bit);
/** 0111 0001 0bit 0100 mov1 cy, %1 */
/*----------------------------------------------------------------------*/
-/** 0110 0001 1100 1110 movs %e0%0, %1 */
+/** 0110 0001 1100 1110 movs %e0, %1 */
ID(mov); DM(HL, IMMU(1)); SR(X); Fzc;
/*----------------------------------------------------------------------*/
-/** 1011 1111 movw %e0%!0, %1 */
+/** 1011 1111 movw %e!0, %1 */
ID(mov); W(); DM(None, IMMU(2)); SR(AX);
-/** 1011 1001 movw %e0%0, %1 */
+/** 1011 1001 movw %e0, %1 */
ID(mov); W(); DM(DE, 0); SR(AX);
-/** 1011 1010 movw %e0%0, %1 */
+/** 1011 1010 movw %e0, %1 */
ID(mov); W(); DM(DE, IMMU(1)); SR(AX);
-/** 1011 1011 movw %e0%0, %1 */
+/** 1011 1011 movw %e0, %1 */
ID(mov); W(); DM(HL, 0); SR(AX);
-/** 1011 1100 movw %e0%0, %1 */
+/** 1011 1100 movw %e0, %1 */
ID(mov); W(); DM(HL, IMMU(1)); SR(AX);
/** 1011 1000 movw %0, %1 */
ID(mov); W(); DM(SP, IMMU(1)); SR(AX);
-/** 1010 1111 movw %0, %e1%!1 */
+/** 1010 1111 movw %0, %e!1 */
ID(mov); W(); DR(AX); SM(None, IMMU(2));
-/** 1010 1001 movw %0, %e1%1 */
+/** 1010 1001 movw %0, %e1 */
ID(mov); W(); DR(AX); SM(DE, 0);
-/** 1010 1010 movw %0, %e1%1 */
+/** 1010 1010 movw %0, %e1 */
ID(mov); W(); DR(AX); SM(DE, IMMU(1));
-/** 1010 1011 movw %0, %e1%1 */
+/** 1010 1011 movw %0, %e1 */
ID(mov); W(); DR(AX); SM(HL, 0);
-/** 1010 1100 movw %0, %e1%1 */
+/** 1010 1100 movw %0, %e1 */
ID(mov); W(); DR(AX); SM(HL, IMMU(1));
/** 1010 1000 movw %0, %1 */
/** 0001 0ra0 movw %0, %1 */
ID(mov); W(); DRW(ra); SR(AX);
-/** 0101 1001 movw %0, %e1%1 */
+/** 0101 1001 movw %0, %e1 */
ID(mov); W(); DR(AX); SM(B, IMMU(2));
-/** 0110 1001 movw %0, %e1%1 */
+/** 0110 1001 movw %0, %e1 */
ID(mov); W(); DR(AX); SM(C, IMMU(2));
-/** 0111 1001 movw %0, %e1%1 */
+/** 0111 1001 movw %0, %e1 */
ID(mov); W(); DR(AX); SM(BC, IMMU(2));
-/** 0101 1000 movw %e0%0, %1 */
+/** 0101 1000 movw %e0, %1 */
ID(mov); W(); DM(B, IMMU(2)); SR(AX);
-/** 0110 1000 movw %e0%0, %1 */
+/** 0110 1000 movw %e0, %1 */
ID(mov); W(); DM(C, IMMU(2)); SR(AX);
-/** 0111 1000 movw %e0%0, %1 */
+/** 0111 1000 movw %e0, %1 */
ID(mov); W(); DM(BC, IMMU(2)); SR(AX);
/** 1010 1101 movw %0, %1 */
/** 1010 1110 movw %0, %s1 */
ID(mov); W(); DR(AX); SM(None, SFR);
-/** 11ra 1011 movw %0, %e1%!1 */
+/** 11ra 1011 movw %0, %e!1 */
ID(mov); W(); DRW(ra); SM(None, IMMU(2));
/** 11ra 1010 movw %0, %1 */
/*----------------------------------------------------------------------*/
-/** 1110 0101 oneb %e0%!0 */
+/** 1110 0101 oneb %e!0 */
ID(mov); DM(None, IMMU(2)); SC(1);
/** 1110 00rg oneb %0 */
/*----------------------------------------------------------------------*/
-/** 0110 1111 or %0, %e1%!1 */
+/** 0110 1111 or %0, %e!1 */
ID(or); DR(A); SM(None, IMMU(2)); Fz;
-/** 0110 1101 or %0, %e1%1 */
+/** 0110 1101 or %0, %e1 */
ID(or); DR(A); SM(HL, 0); Fz;
-/** 0110 0001 1110 0000 or %0, %e1%1 */
+/** 0110 0001 1110 0000 or %0, %e1 */
ID(or); DR(A); SM2(HL, B, 0); Fz;
-/** 0110 1110 or %0, %e1%1 */
+/** 0110 1110 or %0, %e1 */
ID(or); DR(A); SM(HL, IMMU(1)); Fz;
-/** 0110 0001 1110 0010 or %0, %e1%1 */
+/** 0110 0001 1110 0010 or %0, %e1 */
ID(or); DR(A); SM2(HL, C, 0); Fz;
/** 0110 1100 or %0, #%1 */
/*----------------------------------------------------------------------*/
-/** 0111 0001 1bit 0110 or1 cy, %e1%1 */
+/** 0111 0001 1bit 0110 or1 cy, %e1 */
ID(or); DCY(); SM(HL, 0); SB(bit);
/** 0111 0001 1bit 1110 or1 cy, %1 */
/*----------------------------------------------------------------------*/
-/** 0111 0001 0bit 0000 set1 %e0%!0 */
+/** 0111 0001 0bit 0000 set1 %e!0 */
ID(mov); DM(None, IMMU(2)); DB(bit); SC(1);
-/** 0111 0001 1bit 0010 set1 %e0%0 */
+/** 0111 0001 1bit 0010 set1 %e0 */
ID(mov); DM(HL, 0); DB(bit); SC(1);
/** 0111 0001 1bit 1010 set1 %0 */
/*----------------------------------------------------------------------*/
-/** 0110 0001 1111 1101 stop */
+/** 0110 0001 1111 1101 stop */
ID(stop);
/*----------------------------------------------------------------------*/
-/** 0010 1111 sub %0, %e1%!1 */
+/** 0010 1111 sub %0, %e!1 */
ID(sub); DR(A); SM(None, IMMU(2)); Fzac;
-/** 0010 1101 sub %0, %e1%1 */
+/** 0010 1101 sub %0, %e1 */
ID(sub); DR(A); SM(HL, 0); Fzac;
-/** 0110 0001 1010 000 sub %0, %e1%1 */
+/** 0110 0001 1010 000 sub %0, %e1 */
ID(sub); DR(A); SM2(HL, B, 0); Fzac;
-/** 0010 1110 sub %0, %e1%1 */
+/** 0010 1110 sub %0, %e1 */
ID(sub); DR(A); SM(HL, IMMU(1)); Fzac;
-/** 0110 0001 1010 0010 sub %0, %e1%1 */
+/** 0110 0001 1010 0010 sub %0, %e1 */
ID(sub); DR(A); SM2(HL, C, 0); Fzac;
/** 0010 1100 sub %0, #%1 */
/*----------------------------------------------------------------------*/
-/** 0011 1111 subc %0, %e1%!1 */
+/** 0011 1111 subc %0, %e!1 */
ID(subc); DR(A); SM(None, IMMU(2)); Fzac;
-/** 0011 1101 subc %0, %e1%1 */
+/** 0011 1101 subc %0, %e1 */
ID(subc); DR(A); SM(HL, 0); Fzac;
-/** 0110 0001 1011 0000 subc %0, %e1%1 */
+/** 0110 0001 1011 0000 subc %0, %e1 */
ID(subc); DR(A); SM2(HL, B, 0); Fzac;
-/** 0110 0001 1011 0010 subc %0, %e1%1 */
+/** 0110 0001 1011 0010 subc %0, %e1 */
ID(subc); DR(A); SM2(HL, C, 0); Fzac;
-/** 0011 1110 subc %0, %e1%1 */
+/** 0011 1110 subc %0, %e1 */
ID(subc); DR(A); SM(HL, IMMU(1)); Fzac;
/** 0011 1100 subc %0, #%1 */
/*----------------------------------------------------------------------*/
-/** 0010 0010 subw %0, %e1%!1 */
+/** 0010 0010 subw %0, %e!1 */
ID(sub); W(); DR(AX); SM(None, IMMU(2)); Fzac;
-/** 0110 0001 0010 1001 subw %0, %e1%1 */
+/** 0110 0001 0010 1001 subw %0, %e1 */
ID(sub); W(); DR(AX); SM(HL, IMMU(1)); Fzac;
/** 0010 0100 subw %0, #%1 */
/*----------------------------------------------------------------------*/
-/** 0110 0001 1010 1010 xch %0, %e1%!1 */
+/** 0110 0001 1010 1010 xch %0, %e!1 */
ID(xch); DR(A); SM(None, IMMU(2));
-/** 0110 0001 1010 1110 xch %0, %e1%1 */
+/** 0110 0001 1010 1110 xch %0, %e1 */
ID(xch); DR(A); SM(DE, 0);
-/** 0110 0001 1010 1111 xch %0, %e1%1 */
+/** 0110 0001 1010 1111 xch %0, %e1 */
ID(xch); DR(A); SM(DE, IMMU(1));
-/** 0110 0001 1010 1100 xch %0, %e1%1 */
+/** 0110 0001 1010 1100 xch %0, %e1 */
ID(xch); DR(A); SM(HL, 0);
-/** 0110 0001 1011 1001 xch %0, %e1%1 */
+/** 0110 0001 1011 1001 xch %0, %e1 */
ID(xch); DR(A); SM2(HL, B, 0);
-/** 0110 0001 1010 1101 xch %0, %e1%1 */
+/** 0110 0001 1010 1101 xch %0, %e1 */
ID(xch); DR(A); SM(HL, IMMU(1));
-/** 0110 0001 1010 1001 xch %0, %e1%1 */
+/** 0110 0001 1010 1001 xch %0, %e1 */
ID(xch); DR(A); SM2(HL, C, 0);
/** 0110 0001 1000 1reg xch %0, %1 */
/*----------------------------------------------------------------------*/
-/** 0111 1111 xor %0, %e1%!1 */
+/** 0111 1111 xor %0, %e!1 */
ID(xor); DR(A); SM(None, IMMU(2)); Fz;
-/** 0111 1101 xor %0, %e1%1 */
+/** 0111 1101 xor %0, %e1 */
ID(xor); DR(A); SM(HL, 0); Fz;
-/** 0110 0001 1111 0000 xor %0, %e1%1 */
+/** 0110 0001 1111 0000 xor %0, %e1 */
ID(xor); DR(A); SM2(HL, B, 0); Fz;
-/** 0111 1110 xor %0, %e1%1 */
+/** 0111 1110 xor %0, %e1 */
ID(xor); DR(A); SM(HL, IMMU(1)); Fz;
-/** 0110 0001 1111 0010 xor %0, %e1%1 */
+/** 0110 0001 1111 0010 xor %0, %e1 */
ID(xor); DR(A); SM2(HL, C, 0); Fz;
/** 0111 1100 xor %0, #%1 */
/*----------------------------------------------------------------------*/
-/** 0111 0001 1bit 0111 xor1 cy, %e1%1 */
+/** 0111 0001 1bit 0111 xor1 cy, %e1 */
ID(xor); DCY(); SM(HL, 0); SB(bit);
/** 0111 0001 1bit 1111 xor1 cy, %1 */
projects / platform / upstream / binutils.git / blobdiff