* m10300-opc.c (lsr_add): Fix typo for "lsr_add imm,reg,reg,reg" case.

[platform/upstream/binutils.git] / opcodes / m10300-opc.c

diff --git a/opcodes/m10300-opc.c b/opcodes/m10300-opc.c
index 3d204fa..b8c8c62 100644 (file)
--- a/opcodes/m10300-opc.c
+++ b/opcodes/m10300-opc.c
@@ -1480,7 +1480,7 @@ const struct mn10300_opcode mn10300_opcodes[] = {
 { "cmp_xor",   0xf74a0000,  0xffff0000,  0xa,  FMT_D10, AM33,   {RM2, RN0, RM6, RN4}},
 { "cmp_xor",   0xf75a0000,  0xffff0000,  0xa,  FMT_D10, AM33,   {SIMM4_2, RN0, RM6, RN4}},
 { "lsr_add",   0xf7a00000,  0xffff0000,  0xa,  FMT_D10, AM33,   {RM2, RN0, RM6, RN4}},
-{ "lsr_add",   0xf7900000,  0xffff0000,  0xa,  FMT_D10, AM33,   {IMM4_2, RN0, RM6, RN4}},
+{ "lsr_add",   0xf7b00000,  0xffff0000,  0xa,  FMT_D10, AM33,   {IMM4_2, RN0, RM6, RN4}},
 { "lsr_add",   0xf7a40000,  0xffff0000,  0xa,  FMT_D10, AM33,   {RM2, RN0, SIMM4_6, RN4}},
 { "lsr_add",   0xf7b40000,  0xffff0000,  0xa,  FMT_D10, AM33,   {IMM4_2, RN0, SIMM4_6, RN4}},
 { "lsr_and",   0xf7a80000,  0xffff0000,  0xa,  FMT_D10, AM33,   {RM2, RN0, RM6, RN4}},