Add support for ARC instruction relaxation in the assembler.

[external/binutils.git] / opcodes / aarch64-gen.c

diff --git a/opcodes/aarch64-gen.c b/opcodes/aarch64-gen.c
index bc1e58a..c106c7d 100644 (file)
--- a/opcodes/aarch64-gen.c
+++ b/opcodes/aarch64-gen.c
@@ -1,6 +1,6 @@
 /* aarch64-gen.c -- Generate tables and routines for opcode lookup and
    instruction encoding and decoding.
-   Copyright (C) 2012-2015 Free Software Foundation, Inc.
+   Copyright (C) 2012-2016 Free Software Foundation, Inc.
    Contributed by ARM Ltd.
 
    This file is part of the GNU opcodes library.
@@ -690,15 +690,17 @@ opcode_node *
 find_alias_opcode (const aarch64_opcode *opcode)
 {
   int i;
-  /* Assume maximum of 8 disassemble preference candidates.  */
-  const int max_num_aliases = 8;
+  /* Assume maximum of 16 disassemble preference candidates.  */
+  const int max_num_aliases = 16;
   const aarch64_opcode *ent;
-  const aarch64_opcode *preferred[max_num_aliases];
+  const aarch64_opcode *preferred[max_num_aliases + 1];
   opcode_node head, **next;
 
   assert (opcode_has_alias (opcode));
 
   i = 0;
+  if (opcode->name != NULL)
+    preferred[i++] = opcode;
   ent = aarch64_opcode_table;
   while (ent->name != NULL)
     {
@@ -1242,7 +1244,7 @@ main (int argc, char **argv)
     print_divide_result (decoder_tree);
 
   printf ("/* This file is automatically generated by aarch64-gen.  Do not edit!  */\n");
-  printf ("/* Copyright (C) 2012-2015 Free Software Foundation, Inc.\n\
+  printf ("/* Copyright (C) 2012-2016 Free Software Foundation, Inc.\n\
    Contributed by ARM Ltd.\n\
 \n\
    This file is part of the GNU opcodes library.\n\