+Sun Sep 19 10:41:27 1999 Jeffrey A Law (law@cygnus.com)
+
+ * hppa-dis.c (print_insn_hppa): Handle 'M' and 'L' operands.
+
+ * hppa-dis.c (print_insn_hppa): Handle 'l' operand.
+
+ * hppa-dis.c (print_insn_hppa): Handle 'g' operand.
+
+Sat Sep 18 11:36:12 1999 Jeffrey A Law (law@cygnus.com)
+
+ * hppa-dis.c (print_insn_hppa): Output a space after 'X' completer.
+
+ * hppa-dis.c: (print_insn_hppa): Do output a space before a 'v'
+ operand.
+
+ * hppa-dis.c: (print_insn_hppa): Handle 'fX'.
+
+ * hppa-dis.c: (print_insn_hppa): Add missing break after
+ FP register case.
+
+ * hppa-dis.c: Finish constifying various completers, register
+ names, etc etc.
+
+1999-09-14 Michael Meissner <meissner@cygnus.com>
+
+ * configure.in (Canonicalization of target names): Remove adding
+ ${CONFIG_SHELL} in front of $ac_config_sub, since autoconfig 2.14
+ generates $ac_config_sub with a ${CONFIG_SHELL} already.
+ * configure: Regenerate.
+
+Tue Sep 7 13:50:32 1999 Jeffrey A Law (law@cygnus.com)
+
+ * hppa-dis.c (print_insn_hppa): Escape '%' in output strings.
+
+ * hppa-dis.c (print_insn_hppa): Handle 'Z' argument.
+
+1999-09-07 Nick Clifton <nickc@cygnus.com>
+
+ * sh-opc.h: Add mulu.w and muls.w patterns. These are the correct
+ names for the mulu and muls patterns.
+
+1999-09-04 Steve Chamberlain <sac@pobox.com>
+
+ * pj-opc.c: New file.
+ * pj-dis.c: New file.
+ * disassemble.c (disassembler): Handle bfd_arch_pj.
+ * configure.in: Handle bfd_pj_arch.
+ * Makefile.am: Rebuild dependencies.
+ (CFILES): Add pj-dis.c and pj-opc.c.
+ (ALL_MACHINES): Add pj-dis.lo and pj-opc.lo.
+ * configure, Makefile.in: Rebuild.
+
+1999-09-04 H.J. Lu <hjl@gnu.org>
+
+ * i386-dis.c (print_insn_i386): Set bytes_per_line to 7.
+
+Mon Aug 30 18:56:14 1999 Richard Henderson <rth@cygnus.com>
+
+ * alpha-opc.c (fetch, fetch_m, ecb, wh64): RA must be R31.
+
+1999-08-04 Doug Evans <devans@casey.cygnus.com>
+
+ * fr30-asm.c,fr30-desc.h,fr30-dis.c,fr30-ibld.c,fr30-opc.c: Rebuild.
+ * m32r-asm.c,m32r-desc.h,m32r-dis.c,m32r-ibld.c,m32r-opc.c: Rebuild.
+ * m32r-opinst.c: Rebuild.
+
+Sat Aug 28 00:27:24 1999 Jerry Quinn <jquinn@nortelnetworks.com>
+
+ * hppa-dis.c (print_insn_hppa): Replace 'f' by 'v'. Prefix float
+ register args by 'f'.
+
+ * hppa-dis.c (print_insn_hppa): Add args q, %, !, and |.
+
+ * hppa-dis.c (MASK_10, read_write_names, add_compl_names,
+ extract_10U_store): New.
+ (print_insn_hppa): Add new completers.
+
+ * hppa-dis.c (signed_unsigned_names,mix_half_names,
+ saturation_names): New.
+ (print_insn_hppa): Add completer codes 'a', 'ch', 'cH', 'cS', and 'c*'.
+
+ * hppa-dis.c (print_insn_hppa): Place completers behind prefix 'c'.
+
+ * hppa-dis.c (print_insn_hppa): Add cases for '.', '~'. '$'. and '!'
+
+ * hppa-dis.c (print_insn_hppa): Look at next arg instead of bits
+ to decide to print a space.
+
+1999-08-21 Alan Modra <alan@spri.levels.unisa.edu.au>
+
+ * i386-dis.c: Add AMD athlon instruction support.
+
+1999-08-10 Ian Lance Taylor <ian@zembu.com>
+
+ From Wally Iimura <iimura@microunity.com>:
+ * dis-buf.c (buffer_read_memory): Rewrite expression to avoid
+ overflow at end of address space.
+ (generic_print_address): Use sprintf_vma.
+
+1999-08-08 Ian Lance Taylor <ian@zembu.com>
+
+ * Makefile.am: Rename .dep* files to DEP*. Change DEP variable to
+ MKDEP. Rebuild dependencies.
+ * Makefile.in: Rebuild.
+
+Fri Aug 6 09:46:35 1999 Jerry Quinn <jquinn@nortelnetworks.com>
+
+ * hppa-dis.c (compare_cond_64_names, cmpib_cond_64_names,
+ add_cond_64_names, wide_add_cond_names, logical_cond_64_names,
+ unit_cond_64_names, shift_cond_64_names, bb_cond_64_names): New.
+ (print_insn_hppa): Add 64 bit condition completers.
+
+Thu Aug 5 16:59:58 1999 Jerry Quinn <jquinn@nortelnetworks.com>
+
+ * hppa-dis.c (print_insn_hppa): Change condition args to use
+ '?' prefix.
+
+Wed Jul 28 04:33:58 1999 Jerry Quinn <jquinn@nortelnetworks.com>
+
+ * hppa-dis.c (print_insn_hppa): Remove unnecessary test in 'E'
+ code.
+
+1999-07-21 Ian Lance Taylor <ian@zembu.com>
+
+ From Mark Elbrecht:
+ * configure.bat: Remove; obsolete.
+
+1999-07-11 Ian Lance Taylor <ian@zembu.com>
+
+ * dis-buf.c: Add ATTRIBUTE_UNUSED as appropriate.
+ (generic_strcat_address): Add cast to avoid warning.
+ * i386-dis.c: Initialize all structure fields to avoid warnings.
+ Add ATTRIBUTE_UNUSED as appropriate.
+
+1999-07-08 Jakub Jelinek <jj@ultra.linux.cz>
+
+ * sparc-dis.c (print_insn_sparc): Differentiate between
+ addition and oring when guessing symbol for comment.
+
+1999-07-05 Nick Clifton <nickc@cygnus.com>
+
+ * arm-dis.c (print_insn_arm): Display hex equivalent of rotated
+ constant.
+
+1999-06-23 Alan Modra <alan@spri.levels.unisa.edu.au>
+
+ * i386-dis.c: Mention intel mode specials in macro char comment.
+
+1999-06-21 Ian Lance Taylor <ian@zembu.com>
+
+ * alpha-dis.c: Don't include <stdlib.h>.
+ * arm-dis.c: Include "sysdep.h".
+ * tic30-dis.c: Don't include <stdlib.h> or <string.h>. Include
+ "sysdep.h".
+ * Makefile.am: Rebuild dependencies.
+ * Makefile.in: Rebuild.
+
+1999-06-16 Nick Clifton <nickc@cygnus.com>
+
+ * arm-dis.c (print_insn_arm): Add detection of IMB and IMBRange
+ SWIs.
+
+1999-06-14 Nick Clifton <nickc@cygnus.com> & Drew Mosley <dmoseley@cygnus.com>
+
+ * arm-dis.c (arm_regnames): Turn into a pointer to a register
+ name set.
+ (arm_regnames_standard): New variable: Array of ARM register
+ names according to ARM instruction set nomenclature.
+ (arm_regnames_apcs): New variable: Array of ARM register names
+ according to ARM Procedure Call Standard.
+ (arm_regnames_raw): New variable: Array of ARM register names
+ using just 'r' and the register number.
+ (arm_toggle_regnames): New function: Toggle the chosen register set
+ naming scheme.
+ (parse_disassembler_options): New function: Parse any target
+ disassembler command line options.
+ (print_insn_big_arm): Call parse_disassembler_options if any
+ are defined.
+ (print_insn_little_arm): Call parse_disassembler_options if any
+ are defined.
+
+1999-06-13 Ian Lance Taylor <ian@zembu.com>
+
+ * i386-dis.c (FWAIT_OPCODE): Define.
+ (used_prefixes): New static variable.
+ (fetch_data): Don't print an error message if we have already
+ fetched some bytes successfully.
+ (ckprefix): Clear used_prefixes. Use FWAIT_OPCODE, not 0x9b.
+ (prefix_name): New static function.
+ (print_insn_i386): If setjmp fails, indicating a data error, but
+ we have managed to fetch some bytes, print the first one as a
+ prefix or a .byte pseudo-op. If fwait is followed by a non
+ floating point instruction, print the first prefix. Set
+ used_prefixes when prefixes are used. If any prefixes were not
+ used after disassembling the instruction, print the first prefix
+ instead of printing the instruction.
+ (putop): Set used_prefixes when prefixes are used.
+ (append_seg, OP_E, OP_G, OP_REG, OP_I, OP_sI, OP_J): Likewise.
+ (OP_DIR, OP_SIMD_Suffix): Likewise.
+
+1999-06-07 Jakub Jelinek <jj@ultra.linux.cz>
+
+ * sparc-opc.c: Fix up set, setsw, setuw operand kinds.
+ Support signx %reg, clruw %reg.
+
+1999-06-07 Jakub Jelinek <jj@ultra.linux.cz>
+
+ * sparc-opc.c: Add aliases Solaris as supports.
+
+Mon Jun 7 12:04:52 1999 Andreas Schwab <schwab@issan.cs.uni-dortmund.de>
+
+ * Makefile.am (CFILES): Add arc-{dis,opc}.c and v850-{dis,opc}.c.
+ * Makefile.in: Regenerated.
+
+1999-06-03 Philip Blundell <philb@gnu.org>
+
+ * arm-dis.c (print_insn_arm): Make LDRH/LDRB consistent with LDR
+ when target is PC-relative.
+
+1999-05-28 Linus Nordberg <linus.nordberg@canit.se>
+
+ * m68k-opc.c: Rename MACL/MSACL to MAC/MSAC. Add MACM/MSACM. Add
+ MOVE MACSR,CCR.
+
+ * m68k-dis.c (fetch_arg): Add places `n', `o'.
+
+ * m68k-opc.c: Add MSAC, MACL, MOVE to/from ACC, MACSR, MASK.
+ Add mcf5206e to appropriate instructions.
+ Add alias for MAC, MSAC.
+
+ * m68k-dis.c (print_insn_arg): Add formats `E', `G', `H' and place
+ `N'.
+
+ * m68k-opc.c (m68k_opcodes): Add divsw, divsl, divuw, divul, macl,
+ macw, remsl, remul for mcf5307. Change mcf5200 --> mcf.
+
+ * m68k-dis.c: Add format `u' and places `h', `m', `M'.
+
+1999-05-18 Alan Modra <alan@spri.levels.unisa.edu.au>
+
+ * i386-dis.c (Ed): Define.
+ (dis386_twobyte_att, dis386_twobyte_intel): Use Ed for movd.
+ (Rw): Remove.
+ (OP_rm): Rename to OP_Rd.
+ (ONE): Remove.
+ (OP_ONE): Remove.
+ (putop): Add const to template and p.
+ (print_insn_x86): Delete.
+ (print_insn_i386): Merge old function print_insn_x86. Add const
+ to dp.
+ (struct dis386): Add const to name.
+ (dis386_att, dis386_intel): Add const.
+ (dis386_twobyte_att, dis386_twobyte_intel): Add const.
+ (names32, names16, names8, names_seg, index16): Add const.
+ (grps, prefix_user_table, float_reg): Add const.
+ (float_mem_att, float_mem_intel): Add const.
+ (oappend): Add const to s.
+ (OP_REG): Add const to s.
+ (ptr_reg): Add const to s.
+ (dofloat): Add const to dp.
+ (OP_C): Don't skip modrm, it's now done in OP_Rd.
+ (OP_D): Ditto.
+ (OP_T): Ditto.
+ (OP_Rd): Check for valid mod. Call Op_E to print.
+ (OP_E): Handle d_mode arg. Check for bad sfence,lea,lds etc.
+ (OP_MS): Check for valid mod. Call Op_EM to print.
+ (OP_3DNowSuffix): Set obufp and use oappend rather than
+ strcat. Call BadOp() for errors.
+ (OP_SIMD_Suffix): Likewise.
+ (BadOp): New function.
+
+1999-05-12 Alan Modra <alan@spri.levels.unisa.edu.au>
+
+ * i386-dis.c (dis386_intel): Remove macro chars, except for
+ jEcxz. Change cWtR and cRtd to cW and cR.
+ (dis386_twobyte_intel): Remove macro chars here too.
+ (putop): Handle R and W macros for intel mode.
+
+ * i386-dis.c (SIMD_Fixup): New function.
+ (dis386_twobyte_att): Use it on movlps and movhps, and change
+ Ev to EX on these insns. Change movmskps Ev, XM to Gv, EX.
+ (dis386_twobyte_intel): Same here.
+
+ * i386-dis.c (Av): Remove.
+ (Ap): remove lptr.
+ (lptr): Remove.
+ (OPSIMD): Define.
+ (OP_SIMD_Suffix): New function.
+ (OP_DIR): Remove dead code.
+ (eAX_reg..eDI_reg): Renumber.
+ (onebyte_has_modrm): Table numbering comments.
+ (INTERNAL_DISASSEMBLER_ERROR): Move to before print_insn_x86.
+ (print_insn_x86): Move all prefix oappends to after uses_f3_prefix
+ checks. Print error on invalid dp->bytemode2. Remove simd_cmp,
+ and handle SIMD cmp insns in OP_SIMD_Suffix.
+ (info->bytes_per_line): Bump from 5 to 6.
+ (OP_None): Remove.
+ (OP_E): Use INTERNAL_DISASSEMBLER_ERROR. Handle sfence.
+ (OP_3DNowSuffix): Ensure mnemonic index unsigned.
+
+ PIII SIMD support from Doug Ledford <dledford@redhat.com>
+ * i386-dis.c (XM, EX, None): Define.
+ (OP_XMM, OP_EX, OP_None): New functions.
+ (USE_GROUPS, USE_PREFIX_USER_TABLE): Define.
+ (GRP14): Rename to GRPAMD.
+ (GRP*): Add USE_GROUPS flag.
+ (PREGRP*): Define.
+ (dis386_twobyte_att, dis386_twobyte_intel): Add SIMD insns.
+ (twobyte_has_modrm): Add SIMD entries.
+ (twobyte_uses_f3_prefix, simd_cmp_op, prefix_user_table): New.
+ (grps): Add SIMD insns.
+ (print_insn_x86): New vars uses_f3_prefix and simd_cmp. Don't
+ oappend repz if uses_f3_prefix. Add code to handle new groups for
+ SIMD insns.
+
+ From Maciej W. Rozycki <macro@ds2.pg.gda.pl>
+ * i386-dis.c (dis386_att, dis386_intel): Change 0xE8 call insn
+ operand from Av to Jv.
+
1999-05-07 Nick Clifton <nickc@cygnus.com>
* mcore-dis.c (print_insn_mcore): Use .short to display