+Sun Sep 19 10:41:27 1999 Jeffrey A Law (law@cygnus.com)
+
+ * hppa-dis.c (print_insn_hppa): Handle 'M' and 'L' operands.
+
+ * hppa-dis.c (print_insn_hppa): Handle 'l' operand.
+
+ * hppa-dis.c (print_insn_hppa): Handle 'g' operand.
+
+Sat Sep 18 11:36:12 1999 Jeffrey A Law (law@cygnus.com)
+
+ * hppa-dis.c (print_insn_hppa): Output a space after 'X' completer.
+
+ * hppa-dis.c: (print_insn_hppa): Do output a space before a 'v'
+ operand.
+
+ * hppa-dis.c: (print_insn_hppa): Handle 'fX'.
+
+ * hppa-dis.c: (print_insn_hppa): Add missing break after
+ FP register case.
+
+ * hppa-dis.c: Finish constifying various completers, register
+ names, etc etc.
+
+1999-09-14 Michael Meissner <meissner@cygnus.com>
+
+ * configure.in (Canonicalization of target names): Remove adding
+ ${CONFIG_SHELL} in front of $ac_config_sub, since autoconfig 2.14
+ generates $ac_config_sub with a ${CONFIG_SHELL} already.
+ * configure: Regenerate.
+
+Tue Sep 7 13:50:32 1999 Jeffrey A Law (law@cygnus.com)
+
+ * hppa-dis.c (print_insn_hppa): Escape '%' in output strings.
+
+ * hppa-dis.c (print_insn_hppa): Handle 'Z' argument.
+
+1999-09-07 Nick Clifton <nickc@cygnus.com>
+
+ * sh-opc.h: Add mulu.w and muls.w patterns. These are the correct
+ names for the mulu and muls patterns.
+
+1999-09-04 Steve Chamberlain <sac@pobox.com>
+
+ * pj-opc.c: New file.
+ * pj-dis.c: New file.
+ * disassemble.c (disassembler): Handle bfd_arch_pj.
+ * configure.in: Handle bfd_pj_arch.
+ * Makefile.am: Rebuild dependencies.
+ (CFILES): Add pj-dis.c and pj-opc.c.
+ (ALL_MACHINES): Add pj-dis.lo and pj-opc.lo.
+ * configure, Makefile.in: Rebuild.
+
+1999-09-04 H.J. Lu <hjl@gnu.org>
+
+ * i386-dis.c (print_insn_i386): Set bytes_per_line to 7.
+
+Mon Aug 30 18:56:14 1999 Richard Henderson <rth@cygnus.com>
+
+ * alpha-opc.c (fetch, fetch_m, ecb, wh64): RA must be R31.
+
+1999-08-04 Doug Evans <devans@casey.cygnus.com>
+
+ * fr30-asm.c,fr30-desc.h,fr30-dis.c,fr30-ibld.c,fr30-opc.c: Rebuild.
+ * m32r-asm.c,m32r-desc.h,m32r-dis.c,m32r-ibld.c,m32r-opc.c: Rebuild.
+ * m32r-opinst.c: Rebuild.
+
+Sat Aug 28 00:27:24 1999 Jerry Quinn <jquinn@nortelnetworks.com>
+
+ * hppa-dis.c (print_insn_hppa): Replace 'f' by 'v'. Prefix float
+ register args by 'f'.
+
+ * hppa-dis.c (print_insn_hppa): Add args q, %, !, and |.
+
+ * hppa-dis.c (MASK_10, read_write_names, add_compl_names,
+ extract_10U_store): New.
+ (print_insn_hppa): Add new completers.
+
+ * hppa-dis.c (signed_unsigned_names,mix_half_names,
+ saturation_names): New.
+ (print_insn_hppa): Add completer codes 'a', 'ch', 'cH', 'cS', and 'c*'.
+
+ * hppa-dis.c (print_insn_hppa): Place completers behind prefix 'c'.
+
+ * hppa-dis.c (print_insn_hppa): Add cases for '.', '~'. '$'. and '!'
+
+ * hppa-dis.c (print_insn_hppa): Look at next arg instead of bits
+ to decide to print a space.
+
+1999-08-21 Alan Modra <alan@spri.levels.unisa.edu.au>
+
+ * i386-dis.c: Add AMD athlon instruction support.
+
+1999-08-10 Ian Lance Taylor <ian@zembu.com>
+
+ From Wally Iimura <iimura@microunity.com>:
+ * dis-buf.c (buffer_read_memory): Rewrite expression to avoid
+ overflow at end of address space.
+ (generic_print_address): Use sprintf_vma.
+
+1999-08-08 Ian Lance Taylor <ian@zembu.com>
+
+ * Makefile.am: Rename .dep* files to DEP*. Change DEP variable to
+ MKDEP. Rebuild dependencies.
+ * Makefile.in: Rebuild.
+
+Fri Aug 6 09:46:35 1999 Jerry Quinn <jquinn@nortelnetworks.com>
+
+ * hppa-dis.c (compare_cond_64_names, cmpib_cond_64_names,
+ add_cond_64_names, wide_add_cond_names, logical_cond_64_names,
+ unit_cond_64_names, shift_cond_64_names, bb_cond_64_names): New.
+ (print_insn_hppa): Add 64 bit condition completers.
+
+Thu Aug 5 16:59:58 1999 Jerry Quinn <jquinn@nortelnetworks.com>
+
+ * hppa-dis.c (print_insn_hppa): Change condition args to use
+ '?' prefix.
+
+Wed Jul 28 04:33:58 1999 Jerry Quinn <jquinn@nortelnetworks.com>
+
+ * hppa-dis.c (print_insn_hppa): Remove unnecessary test in 'E'
+ code.
+
+1999-07-21 Ian Lance Taylor <ian@zembu.com>
+
+ From Mark Elbrecht:
+ * configure.bat: Remove; obsolete.
+
+1999-07-11 Ian Lance Taylor <ian@zembu.com>
+
+ * dis-buf.c: Add ATTRIBUTE_UNUSED as appropriate.
+ (generic_strcat_address): Add cast to avoid warning.
+ * i386-dis.c: Initialize all structure fields to avoid warnings.
+ Add ATTRIBUTE_UNUSED as appropriate.
+
+1999-07-08 Jakub Jelinek <jj@ultra.linux.cz>
+
+ * sparc-dis.c (print_insn_sparc): Differentiate between
+ addition and oring when guessing symbol for comment.
+
+1999-07-05 Nick Clifton <nickc@cygnus.com>
+
+ * arm-dis.c (print_insn_arm): Display hex equivalent of rotated
+ constant.
+
+1999-06-23 Alan Modra <alan@spri.levels.unisa.edu.au>
+
+ * i386-dis.c: Mention intel mode specials in macro char comment.
+
+1999-06-21 Ian Lance Taylor <ian@zembu.com>
+
+ * alpha-dis.c: Don't include <stdlib.h>.
+ * arm-dis.c: Include "sysdep.h".
+ * tic30-dis.c: Don't include <stdlib.h> or <string.h>. Include
+ "sysdep.h".
+ * Makefile.am: Rebuild dependencies.
+ * Makefile.in: Rebuild.
+
+1999-06-16 Nick Clifton <nickc@cygnus.com>
+
+ * arm-dis.c (print_insn_arm): Add detection of IMB and IMBRange
+ SWIs.
+
+1999-06-14 Nick Clifton <nickc@cygnus.com> & Drew Mosley <dmoseley@cygnus.com>
+
+ * arm-dis.c (arm_regnames): Turn into a pointer to a register
+ name set.
+ (arm_regnames_standard): New variable: Array of ARM register
+ names according to ARM instruction set nomenclature.
+ (arm_regnames_apcs): New variable: Array of ARM register names
+ according to ARM Procedure Call Standard.
+ (arm_regnames_raw): New variable: Array of ARM register names
+ using just 'r' and the register number.
+ (arm_toggle_regnames): New function: Toggle the chosen register set
+ naming scheme.
+ (parse_disassembler_options): New function: Parse any target
+ disassembler command line options.
+ (print_insn_big_arm): Call parse_disassembler_options if any
+ are defined.
+ (print_insn_little_arm): Call parse_disassembler_options if any
+ are defined.
+
+1999-06-13 Ian Lance Taylor <ian@zembu.com>
+
+ * i386-dis.c (FWAIT_OPCODE): Define.
+ (used_prefixes): New static variable.
+ (fetch_data): Don't print an error message if we have already
+ fetched some bytes successfully.
+ (ckprefix): Clear used_prefixes. Use FWAIT_OPCODE, not 0x9b.
+ (prefix_name): New static function.
+ (print_insn_i386): If setjmp fails, indicating a data error, but
+ we have managed to fetch some bytes, print the first one as a
+ prefix or a .byte pseudo-op. If fwait is followed by a non
+ floating point instruction, print the first prefix. Set
+ used_prefixes when prefixes are used. If any prefixes were not
+ used after disassembling the instruction, print the first prefix
+ instead of printing the instruction.
+ (putop): Set used_prefixes when prefixes are used.
+ (append_seg, OP_E, OP_G, OP_REG, OP_I, OP_sI, OP_J): Likewise.
+ (OP_DIR, OP_SIMD_Suffix): Likewise.
+
+1999-06-07 Jakub Jelinek <jj@ultra.linux.cz>
+
+ * sparc-opc.c: Fix up set, setsw, setuw operand kinds.
+ Support signx %reg, clruw %reg.
+
+1999-06-07 Jakub Jelinek <jj@ultra.linux.cz>
+
+ * sparc-opc.c: Add aliases Solaris as supports.
+
+Mon Jun 7 12:04:52 1999 Andreas Schwab <schwab@issan.cs.uni-dortmund.de>
+
+ * Makefile.am (CFILES): Add arc-{dis,opc}.c and v850-{dis,opc}.c.
+ * Makefile.in: Regenerated.
+
+1999-06-03 Philip Blundell <philb@gnu.org>
+
+ * arm-dis.c (print_insn_arm): Make LDRH/LDRB consistent with LDR
+ when target is PC-relative.
+
+1999-05-28 Linus Nordberg <linus.nordberg@canit.se>
+
+ * m68k-opc.c: Rename MACL/MSACL to MAC/MSAC. Add MACM/MSACM. Add
+ MOVE MACSR,CCR.
+
+ * m68k-dis.c (fetch_arg): Add places `n', `o'.
+
+ * m68k-opc.c: Add MSAC, MACL, MOVE to/from ACC, MACSR, MASK.
+ Add mcf5206e to appropriate instructions.
+ Add alias for MAC, MSAC.
+
+ * m68k-dis.c (print_insn_arg): Add formats `E', `G', `H' and place
+ `N'.
+
+ * m68k-opc.c (m68k_opcodes): Add divsw, divsl, divuw, divul, macl,
+ macw, remsl, remul for mcf5307. Change mcf5200 --> mcf.
+
+ * m68k-dis.c: Add format `u' and places `h', `m', `M'.
+
+1999-05-18 Alan Modra <alan@spri.levels.unisa.edu.au>
+
+ * i386-dis.c (Ed): Define.
+ (dis386_twobyte_att, dis386_twobyte_intel): Use Ed for movd.
+ (Rw): Remove.
+ (OP_rm): Rename to OP_Rd.
+ (ONE): Remove.
+ (OP_ONE): Remove.
+ (putop): Add const to template and p.
+ (print_insn_x86): Delete.
+ (print_insn_i386): Merge old function print_insn_x86. Add const
+ to dp.
+ (struct dis386): Add const to name.
+ (dis386_att, dis386_intel): Add const.
+ (dis386_twobyte_att, dis386_twobyte_intel): Add const.
+ (names32, names16, names8, names_seg, index16): Add const.
+ (grps, prefix_user_table, float_reg): Add const.
+ (float_mem_att, float_mem_intel): Add const.
+ (oappend): Add const to s.
+ (OP_REG): Add const to s.
+ (ptr_reg): Add const to s.
+ (dofloat): Add const to dp.
+ (OP_C): Don't skip modrm, it's now done in OP_Rd.
+ (OP_D): Ditto.
+ (OP_T): Ditto.
+ (OP_Rd): Check for valid mod. Call Op_E to print.
+ (OP_E): Handle d_mode arg. Check for bad sfence,lea,lds etc.
+ (OP_MS): Check for valid mod. Call Op_EM to print.
+ (OP_3DNowSuffix): Set obufp and use oappend rather than
+ strcat. Call BadOp() for errors.
+ (OP_SIMD_Suffix): Likewise.
+ (BadOp): New function.
+
+1999-05-12 Alan Modra <alan@spri.levels.unisa.edu.au>
+
+ * i386-dis.c (dis386_intel): Remove macro chars, except for
+ jEcxz. Change cWtR and cRtd to cW and cR.
+ (dis386_twobyte_intel): Remove macro chars here too.
+ (putop): Handle R and W macros for intel mode.
+
+ * i386-dis.c (SIMD_Fixup): New function.
+ (dis386_twobyte_att): Use it on movlps and movhps, and change
+ Ev to EX on these insns. Change movmskps Ev, XM to Gv, EX.
+ (dis386_twobyte_intel): Same here.
+
+ * i386-dis.c (Av): Remove.
+ (Ap): remove lptr.
+ (lptr): Remove.
+ (OPSIMD): Define.
+ (OP_SIMD_Suffix): New function.
+ (OP_DIR): Remove dead code.
+ (eAX_reg..eDI_reg): Renumber.
+ (onebyte_has_modrm): Table numbering comments.
+ (INTERNAL_DISASSEMBLER_ERROR): Move to before print_insn_x86.
+ (print_insn_x86): Move all prefix oappends to after uses_f3_prefix
+ checks. Print error on invalid dp->bytemode2. Remove simd_cmp,
+ and handle SIMD cmp insns in OP_SIMD_Suffix.
+ (info->bytes_per_line): Bump from 5 to 6.
+ (OP_None): Remove.
+ (OP_E): Use INTERNAL_DISASSEMBLER_ERROR. Handle sfence.
+ (OP_3DNowSuffix): Ensure mnemonic index unsigned.
+
+ PIII SIMD support from Doug Ledford <dledford@redhat.com>
+ * i386-dis.c (XM, EX, None): Define.
+ (OP_XMM, OP_EX, OP_None): New functions.
+ (USE_GROUPS, USE_PREFIX_USER_TABLE): Define.
+ (GRP14): Rename to GRPAMD.
+ (GRP*): Add USE_GROUPS flag.
+ (PREGRP*): Define.
+ (dis386_twobyte_att, dis386_twobyte_intel): Add SIMD insns.
+ (twobyte_has_modrm): Add SIMD entries.
+ (twobyte_uses_f3_prefix, simd_cmp_op, prefix_user_table): New.
+ (grps): Add SIMD insns.
+ (print_insn_x86): New vars uses_f3_prefix and simd_cmp. Don't
+ oappend repz if uses_f3_prefix. Add code to handle new groups for
+ SIMD insns.
+
+ From Maciej W. Rozycki <macro@ds2.pg.gda.pl>
+ * i386-dis.c (dis386_att, dis386_intel): Change 0xE8 call insn
+ operand from Av to Jv.
+
+1999-05-07 Nick Clifton <nickc@cygnus.com>
+
+ * mcore-dis.c (print_insn_mcore): Use .short to display
+ unidentified instructions, not .word.
+
+1999-04-26 Tom Tromey <tromey@cygnus.com>
+
+ * aclocal.m4, configure: Updated for new version of libtool.
+
+1999-04-14 Doug Evans <devans@casey.cygnus.com>
+
+ * fr30-desc.c,fr30-desc.h,fr30-dis.c,fr30-ibld.c,fr30-opc.c: Rebuild.
+ * m32r-desc.c,m32r-desc.h,m32r-dis.c,m32r-ibld.c,m32r-opc.c: Rebuild.
+
+Mon Apr 12 23:46:17 1999 Jeffrey A Law (law@cygnus.com)
+
+ * hppa-dis.c (print_insn_hppa, case '3'): New case for PA2.0
+ instructions.
+
+1999-04-10 Doug Evans <devans@casey.cygnus.com>
+
+ * fr30-desc.c,fr30-desc.h,fr30-ibld.c: Rebuild.
+ * m32r-desc.c,m32r-desc.h,m32r-opinst.c: Rebuild.
+
+1999-04-06 Ian Lance Taylor <ian@zembu.com>
+
+ * opintl.h (LC_MESSAGES): Never define.
+
+1999-04-04 Ian Lance Taylor <ian@zembu.com>
+
+ * i386-dis.c (intel_syntax, open_char, close_char): Make static.
+ (separator_char, scale_char): Likewise.
+ (print_insn_x86): Likewise.
+ (print_insn_i386): Likewise. Add declaration.
+
+1999-03-26 Doug Evans <devans@casey.cygnus.com>
+
+ * fr30-dis.c: Rebuild.
+ * m32r-dis.c: Rebuild.
+
+1999-03-23 Ian Lance Taylor <ian@zembu.com>
+
+ * m68k-opc.c: Change compare instructions to use "@s" rather than
+ ";s" when used with an immediate operand.
+
+1999-03-22 Doug Evans <devans@casey.cygnus.com>
+
+ * cgen-opc.c (cgen_set_cpu): Delete.
+ (cgen_lookup_insn): max_insn_size renamed to max_insn_bitsize.
+ * fr30-desc.c,fr30-desc.h,fr30-dis.c,fr30-ibld.c,fr30-opc.c,fr30-opc.h:
+ Rebuild.
+ * m32r-desc.c,m32r-desc.h,m32r-dis.c,m32r-ibld.c,m32r-opc.c,m32r-opc.h:
+ Rebuild.
+ * po/opcodes.pot: Rebuild.
+
+1999-03-16 Martin Hunt <hunt@cygnus.com>
+
+ * d30v-opc.c (mvtsys): Remove FLAG_LKR.
+
+1999-03-11 Doug Evans <devans@casey.cygnus.com>
+
+ * cgen-opc.c (cgen_set_cpu): New arg `isa'. All callers updated.
+ (cgen_operand_lookup_by_name,cgen_operand_lookup_by_num): New fns.
+ (cgen_get_insn_operands): Rewrite test for hardcoded/operand index.
+ * fr30-asm.c,fr30-desc.c,fr30-desc.h,fr30-dis.c,fr30-ibld.c: Rebuild.
+ * m32r-asm.c,m32r-desc.c,m32r-desc.h,m32r-dis.c,m32r-ibld.c: Rebuild.
+ * m32r-opinst.c: Rebuild.
+
+1999-02-25 Doug Evans <devans@casey.cygnus.com>
+
+ * cgen-opc.c (cgen_hw_lookup_by_name): Rewrite.
+ (cgen_hw_lookup_by_num): Rewrite.
+ * fr30-desc.c,fr30-desc.h,fr30-dis.c,fr30-ibld.c,fr30-opc.c: Rebuild.
+ * m32r-desc.c,m32r-desc.h,m32r-dis.c,m32r-ibld.c,m32r-opc.c: Rebuild.
+ * m32r-opinst.c: Rebuild.
+
+Sat Feb 13 14:06:19 1999 Richard Henderson <rth@cygnus.com>
+
+ * alpha-opc.c: Add sqrt+flags patterns. Add EV6 PALcode insns.
+ (insert_jhint): Fix insertion mask.
+ * alpha-dis.c (print_insn_alpha): Disassemble EV6 PALcode insns.
+
+1999-02-10 Doug Evans <devans@casey.cygnus.com>
+
+ * Makefile.in: Rebuild.
+
+1999-02-09 Doug Evans <devans@casey.cygnus.com>
+
+ * i960c-asm.c,i960c-dis.c,i960c-opc.c,i960c-opc.h: Delete.
+ * i960-dis.c (print_insn_i960): Rename from print_insn_i960_orig.
+ * Makefile.am: Remove references to them.
+ (HFILES): Add fr30-desc.h,m32r-desc.h.
+ (CFILES): Add fr30-desc.c,fr30-ibld.c,m32r-desc.c,m32r-ibld.c,
+ m32r-opinst.c.
+ (ALL_MACHINES): Update.
+ * configure.in: Redo handling of cgen_files.
+ (bfd_i960_arch): Delete i960c-*.lo files.
+ * configure: Regenerate.
+ * cgen-asm.c (*): CGEN_OPCODE_DESC renamed to CGEN_CPU_DESC.
+ (hash_insn_array): Rewrite.
+ * cgen-dis.c (*): CGEN_OPCODE_DESC renamed to CGEN_CPU_DESC.
+ (hash_insn_array): Rewrite.
+ * cgen-opc.c (*): CGEN_OPCODE_DESC renamed to CGEN_CPU_DESC.
+ (cgen_lookup_insn,cgen_get_insn_operands): Define here.
+ (cgen_lookup_get_insn_operands): Ditto.
+ * fr30-asm.c,fr30-dis.c,fr30-opc.c,fr30-opc.h: Regenerate.
+ * m32r-asm.c,m32r-dis.c,m32r-opc.c,m32r-opc.h: Regenerate.
+ * po/POTFILES.in: Rebuild.
+ * po/opcodes.pot: Rebuild.
+
+Fri Feb 5 00:04:24 1999 Ian Lance Taylor <ian@cygnus.com>
+
+ * Makefile.am: Rebuild dependencies.
+ (HFILES): Add fr30-opc.h.
+ (CFILES): Add fr30-asm.c, fr30-dis.c, fr30-opc.c.
+ * Makefile.in: Rebuild.
+
+ * configure.in: Change AC_PREREQ to 2.13. Remove AM_CYGWIN32.
+ Change AM_EXEEXT to AC_EXEEXT and AM_PROG_INSTALL to
+ AC_PROG_INSTALL.
+ * acconfig.h: Remove.
+ * configure: Rebuild with current autoconf/automake.
+ * aclocal.m4: Likewise.
+ * config.in: Likewise.
+ * Makefile.in: Likewise.
+
+Thu Feb 4 13:48:52 1999 Ian Lance Taylor <ian@cygnus.com>
+
+ * m68k-opc.c: Correct move (not movew) to status word on 5200.
+
+Mon Feb 1 20:54:36 1999 Catherine Moore <clm@cygnus.com>
+
+ * disassemble.c (disassembler): Handle bfd_mach_i386_i386_intel_syntax.
+ * i386-dis.c (x_mode): Define.
+ (dis386): Remove.
+ (dis386_att): New.
+ (dis386_intel): New.
+ (dis386_twobyte): Remove.
+ (dis386_twobyte_att): New.
+ (dis386_twobyte_intel): New.
+ (print_insn_x86): Use new arrays.
+ (float_mem): Remove.
+ (float_mem_intel): New.
+ (float_mem_att): New.
+ (dofloat): Use new float_mem arrays.
+ (print_insn_i386_att): New.
+ (print_insn_i386_intel): New.
+ (print_insn_i386): Handle bfd_mach_i386_i386_intel_syntax.
+ (putop): Handle intel syntax.
+ (OP_indirE): Handle intel syntax.
+ (OP_E): Handle intel syntax.
+ (OP_I): Handle intel syntax.
+ (OP_sI): Handle intel syntax.
+ (OP_OFF): Handle intel syntax.
+
+
+
+1999-01-27 Doug Evans <devans@casey.cygnus.com>
+
+ * fr30-opc.h,fr30-opc.c: Rebuild.
+ * i960c-opc.h,i960c-opc.c: Rebuild.
+ * m32r-opc.c: Rebuild.
+
+Tue Jan 19 18:01:54 1999 David Taylor <taylor@texas.cygnus.com>
+
+ * hppa-dis.c: revert HP merge changes until HP gives us
+ an updated file.
+
+1999-01-19 Nick Clifton <nickc@cygnus.com>
+
+ * arm-dis.c (print_insn_arm): Display ARM syntax for PC relative
+ offsets as well as symbloic address.
+
+Tue Jan 19 10:51:01 1999 David Taylor <taylor@texas.cygnus.com>
+
+ * hppa-dis.c: fix comments and some indentation.
+
+1999-01-12 Doug Evans <devans@casey.cygnus.com>
+
+ * fr30-opc.c,i960c-opc.c: Regenerate.
+
+1999-01-11 Doug Evans <devans@casey.cygnus.com>
+
+ * fr30-opc.c: Regenerate.
+
+1999-01-06 Doug Evans <devans@casey.cygnus.com>
+
+ * m32r-dis.c: Regenerate.
+
+1999-01-05 Doug Evans <devans@casey.cygnus.com>
+
+ * fr30-asm.c,fr30-dis.c,fr30-opc.h,fr30-opc.c: Regenerate.
+ * i960c-asm.c,i960c-dis.c,i960c-opc.h,i960c-opc.c: Regenerate.
+ * m32r-asm.c,m32r-dis.c,m32r-opc.h,m32r-opc.c: Regenerate.
+
+1999-01-04 Jason Molenda (jsm@bugshack.cygnus.com)
+
+ * configure.in: Require autoconf 2.12.1 or higher.
+
+1998-12-30 Gavin Romig-Koch <gavin@cygnus.com>
+
+ * mips16-opc.c: Mark branch insns with MIPS16_INSN_BRANCH.
+
+Wed Dec 16 16:17:49 1998 Dave Brolley <brolley@cygnus.com>
+
+ * fr30-opc.c: Regenerated.
+
+1998-12-16 Gavin Romig-Koch <gavin@cygnus.com>
+
+ * mips-dis.c (set_mips_isa_type): Handle bfd_mach_mips4111.
+
+1998-12-15 Dave Brolley <brolley@cygnus.com>
+
+ * fr30-opc.c,fr30-opc.h: Regenerated.
+
+1998-12-14 Dave Brolley <brolley@cygnus.com>
+
+ * fr30-opc.c,fr30-opc.h: Regenerated.
+
+Thu Dec 10 18:39:46 1998 Dave Brolley <brolley@cygnus.com>
+
+ * fr30-opc.c,fr30-opc.h: Regenerated.
+
+Thu Dec 10 12:49:24 1998 Doug Evans <devans@canuck.cygnus.com>
+
+ * m32r-opc.c: Regenerate.
+
+Tue Dec 8 13:56:18 1998 David Taylor <taylor@texas.cygnus.com>
+
+ * dis-buf.c (generic_strcat_address): reformat to GNU coding
+ conventions. change sprintf call to an sprintf_vma call.
+
+Tue Dec 8 13:12:44 1998 Dave Brolley <brolley@cygnus.com>
+
+ * fr30-asm.c,fr30-dis.c,fr30-opc.c,fr30-opc.h: Regenerated.
+
+Tue Dec 8 10:50:46 1998 David Taylor <taylor@texas.cygnus.com>
+
+ The following changes were made by
+ Elena Zannoni <ezannoni@kwikemart.cygnus.com>,
+ David Taylor <taylor@texas.cygnus.com>, and
+ Edith Epstein <eepstein@sophia.cygnus.com> as part of a project to
+ merge in changes by HP; HP did not create ChangeLog entries.
+
+ * dis-buf.c (generic_strcat_address): new function.
+
+ * hppa-dis.c: Changes to improve hppa disassembly.
+ Changed formatting in : reg_names, fp_reg_names,control_reg,
+ New variables : sign_extension_names, deposit_names, conversion_names
+ float_test_names, compare_cond_names_double, add_cond_names_double,
+ logical_cond_names_double, unit_cond_names_double,
+ branch_push_pop_names, saturation_names, shift_names, mix_names,
+ New Macros : GET_COMPL_O, GET_PUSH_POP,MERGED_REG
+ Move some definitions to libhppa.h: GET_FIELD, GET_BIT
+ (fput_const): renamed as fput_hex_const
+ (print_insn_hppa):
+ - use the macros fputs_filtered and
+ fput_decimal_const whenever possible; calls to sign_extend require
+ 2 params -- add a missing second param of 0.
+ - Some new code ifdefed for LOCAL_ONLY, all related to figuring out
+ architecture version number of current machine. HP folks are
+ trying to handle situation where the target program was compiled
+ for PA 1.x (32-bit), but is running on a PA 2.0 machine and
+ visa versa.
+ - added new cases : 'g', 'B', 'm'
+ - added cases specifically for PA 2.0
+ - changed the following cases : '"', 'n', 'N', 'p', 'Z',
+ - calls to fput_const become calls to fput_hex_const
+
+1998-12-07 James E Wilson <wilson@wilson-pc.cygnus.com>
+
+ * Makefile.am (CFILES): Add i960c-asm, i960c-dis.c, i960c-opc.c.
+ (ALL_MACHINES): Add i960c-asm.lo, i960c-dis.lo, i960-opc.lo.
+ (i960-asm.lo, i960c-dis.lo, i960c-opc.lo): New Makefile rules.
+ * Makefile.in: Rebuilt.
+ * configure.in (bfd_i960_arch): Add i960c-opc.lo, i960-asm.o,
+ i960-dis.c to ta.
+ * i960-dis.c (print_insn_i960): Rename to print_insn_i960_orig.
+ * i960c-asm.c, i960c-dis.c, i960c-opc.c, i960c-opc.h: New files.
+
+Mon Dec 7 14:33:44 1998 Dave Brolley <brolley@cygnus.com>
+
+ * fr30-asm.c,fr30-dis.c,fr30-opc.c,fr30-opc.h: Regenerated.
+
+Sun Dec 6 14:06:48 1998 Ian Lance Taylor <ian@cygnus.com>
+
+ * mips-opc.c (mips_builtin_opcodes): Add dmfc2 and dmtc2.
+
+ * ppc-opc.c (powerpc_opcodes): Add PowerPC403 GC[X] instructions.
+ From Saitoh Masanobu <msaitoh@spa.is.uec.ac.jp>.
+
+Fri Dec 4 17:45:51 1998 Doug Evans <devans@canuck.cygnus.com>
+
+ * fr30-opc.c: Regenerate.
+
+Fri Dec 4 17:08:08 1998 Dave Brolley <brolley@cygnus.com>
+
+ * fr30-asm.c,fr30-dis.c,fr30-opc.c,fr30-opc.h: Regenerated.
+
+Thu Dec 3 14:26:20 1998 Dave Brolley <brolley@cygnus.com>
+
+ * fr30-asm.c,fr30-dis.c,fr30-opc.c,fr30-opc.h: Regenerated.
+
+Thu Dec 3 00:09:17 1998 Doug Evans <devans@canuck.cygnus.com>
+
+ * fr30-asm.c,fr30-dis.c,fr30-opc.c,fr30-opc.h: Regenerate.
+
+1998-11-30 Doug Evans <devans@casey.cygnus.com>
+
+ * cgen-dis.c (hash_insn_array): CGEN_INSN_VALUE ->
+ CGEN_INSN_BASE_VALUE.
+ * m32r-opc.c,m32r-opc.h,m32r-asm.c,m32r-dis.c: Regenerate.
+ * fr30-opc.c,fr30-opc.h,fr30-asm.c,fr30-dis.c: Regenerate.
+
+Thu Nov 26 11:26:32 1998 Dave Brolley <brolley@cygnus.com>
+
+ * fr30-asm.c,fr30-dis.c,fr30-opc.c: Regenerated.
+
+Tue Nov 24 11:20:54 1998 Dave Brolley <brolley@cygnus.com>
+
+ * fr30-asm.c,fr30-dis.c: Regenerated.
+
+Mon Nov 23 18:28:48 1998 Dave Brolley <brolley@cygnus.com>
+
+ * fr30-asm.c,fr30-dis.c,fr30-opc.c,fr30-opc.h: Regenerated.
+
+1998-11-20 Doug Evans <devans@tobor.to.cygnus.com>
+
+ * fr30-opc.c: Regenerated.
+
+Thu Nov 19 16:02:46 1998 Dave Brolley <brolley@cygnus.com>
+
+ * fr30-opc.c: Regenerated.
+ * fr30-opc.h: Regenerated.
+ * fr30-dis.c: Regenerated.
+ * fr30-asm.c: Regenerated.
+
+Thu Nov 19 07:54:15 1998 Doug Evans <devans@charmed.cygnus.com>
+
+ * mips-opc.c (sync.p,sync.l): Swap insn values.
+
+1998-11-19 Doug Evans <devans@tobor.to.cygnus.com>
+
+ * fr30-opc.c: Regenerate.
+
+Wed Nov 18 21:36:37 1998 Dave Brolley <brolley@cygnus.com>
+
+ * fr30-opc.c: Regenerated.
+ * fr30-opc.h: Regenerated.
+
+1998-11-18 Doug Evans <devans@casey.cygnus.com>
+
+ * m32r-asm.c,m32r-dis.c,m32r-opc.c: Rebuild.
+ * fr30-asm.c,fr30-dis.c,fr30-opc.c: Rebuild.
+
+Wed Nov 18 11:30:04 1998 Dave Brolley <brolley@cygnus.com>
+
+ * fr30-opc.c: Regenerated.
+
+Mon Nov 16 19:21:48 1998 Dave Brolley <brolley@cygnus.com>
+
+ * fr30-opc.c: Regenerated.
+ * fr30-opc.h: Regenerated.
+ * fr30-dis.c: Regenerated.
+ * fr30-asm.c: Regenerated.
+
+Thu Nov 12 19:24:18 1998 Dave Brolley <brolley@cygnus.com>
+
+ * po/opcodes.pot: Regenerated.
+ * fr30-opc.c: Regenerated.
+ * fr30-opc.h: Regenerated.
+ * fr30-dis.c: Regenerated.
+ * fr30-asm.c: Regenerated.
+
+Tue Nov 10 15:26:27 1998 Nick Clifton <nickc@cygnus.com>
+
+ * disassemble.c (disassembler): Add support for FR30 target.
+
+Tue Nov 10 11:00:04 1998 Doug Evans <devans@canuck.cygnus.com>
+
+ * m32r-dis.c,m32r-opc.c,m32r-opc.h: Rebuild.
+ * fr30-dis.c,fr30-opc.c,fr30-opc.h: Rebuild.
+
+Mon Nov 9 18:22:55 1998 Dave Brolley <brolley@cygnus.com>
+
+ * po/opcodes.pot: Regenerate.
+ * po/POTFILES.in: Regenerate.
+ * fr30-opc.c: Regenerate.
+ * fr30-opc.h: Regenerate.
+
+Fri Nov 6 17:21:38 1998 Doug Evans <devans@canuck.cygnus.com>
+
+ * m32r-asm.c: Regenerate.
+
+Wed Nov 4 18:46:47 1998 Dave Brolley <brolley@cygnus.com>
+
+ * configure.in: Added case for bfd_fr30_arch.
+ * Makefile.am (CFILES): Added fr30-asm.c, fr30-dis.c, fr30-opc.c.
+ (ALL_MACHINES): Added fr30-asm.lo, fr30-dis.lo, fr30-opc.lo.
+ (CLEANFILES): Added stamp-fr30.
+ (FR30_DEPS): Added.
+ * fr30-asm.c: New file.
+ * fr30-dis.c: New file.
+ * fr30-opc.c: New file.
+ * fr30-opc.h: New file.
+ * po/POTFILES.in: Regenerated
+ * po/opcodes.pot: Regenerated
+
+Mon Nov 2 15:05:33 1998 Geoffrey Noer <noer@cygnus.com>
+
+ * configure.in: detect cygwin* instead of cygwin32*
+ * configure: regenerate
+
+Tue Oct 27 08:58:37 1998 Gavin Romig-Koch <gavin@cygnus.com>
+
+ * mips-opc.c (IS_M): Added.
+
+Mon Oct 19 13:03:19 1998 Doug Evans <devans@seba.cygnus.com>
+
+ * m32r-opc.c,m32r-opc.h,m32r-asm.c,m32r-dis.c: Regenerate.
+
+Fri Oct 9 14:01:56 1998 Doug Evans <devans@seba.cygnus.com>
+
+ * m32r-opc.h,m32r-opc.c: Regenerate.
+
+Sun Oct 4 21:01:44 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
+
+ * i386-dis.c (OP_3DNowSuffix): New static function.
+ (OPSUF): Define.
+ (GRP14): Define.
+ (dis386_twobyte): Add GRP14, femms, and 3DNow entries.
+ (twobyte_has_modrm): Set entries corresponding to GRP14, 3DNow.
+ (insn_codep): New static variable.
+ (print_insn_x86): Init insn_codep after prefixes.
+ (grps): Add GRP14 entries for prefetch, prefetchw.
+ (OP_REG): Reformat.
+
+ From Jeff B Epler <jepler@usgs.gov>
+ * i386-dis.c (Suffix3DNow): New table.
+
+Wed Sep 30 10:17:50 1998 Nick Clifton <nickc@cygnus.com>
+
+ * d10v-opc.c: Treat TRAP as if it were a branch type instruction.
+
+Mon Sep 28 14:35:43 1998 Martin M. Hunt <hunt@cygnus.com>
+
+ * d10v-dis.c (print_operand): If num is nonzero, then
+ add OPERAND_ACC1, not OPERAND_ACC0.
+
+Thu Sep 24 09:20:03 1998 Nick Clifton <nickc@cygnus.com>
+
+ * d30v-opc.c: Add FLAG_JSR attribute to DBT, REIT, RTD, and TRAP
+ insns.
+
+Tue Sep 22 17:55:14 1998 Nick Clifton <nickc@cygnus.com>
+
+ * d30v-opc.c: Add use of EITHER_BUT_PREFER_MU execution unit
+ class.
+
+Tue Sep 15 15:14:45 1998 Doug Evans <devans@canuck.cygnus.com>
+
+ * m32r-opc.h,m32r-opc.c: Add bbpc,bbpsw support.
+
+1998-09-09 Michael Meissner <meissner@cygnus.com>
+
+ * ppc-opc.c (powerpc_opcodes): Add support for PowerPC 750 move
+ to/from SPRs.
+
+Fri Sep 4 19:42:59 1998 Nick Clifton <nickc@cygnus.com>
+
+ * arm-dis.c (print_insn_big_arm): Detect Thumb symbols in elf
+ object files.
+ (print_insn_little_arm): Detect Thumb symbols in elf object
+ files.
+
+Sat Aug 29 22:24:09 1998 Richard Henderson <rth@cygnus.com>
+
+ * alpha-dis.c (print_insn_alpha): Use the machine type to
+ decide which PALcode set to include.
+
+Sun Aug 23 02:16:18 1998 Richard Henderson <rth@cygnus.com>
+
+ * sparc-opc.c (FBRX): Fix typo in ",a,pn %fcc3" case.
+
+Fri Aug 21 16:07:52 1998 Nick Clifton <nickc@cygnus.com>
+
+ * d30v-opc.c (d30v_opcode_table): Add FLAG_MUL32 to MAC, MACS,
+ MSUB and MSUBS instructions.
+
+Thu Aug 13 16:23:04 1998 Ian Lance Taylor <ian@cygnus.com>
+
+ * ppc-opc.c (powerpc_operands): Omit parens around additions in
+ operand name macros.
+
+Wed Aug 12 14:00:38 1998 Ian Lance Taylor <ian@cygnus.com>
+
+ From Peter Jeremy <peter.jeremy@auss2.alcatel.com.au>:
+ * m68k-opc.c: Correct mulsl and mulul to use q rather than D, a,
+ +, -, and d for ColdFire.
+
+ From Peter Thiemann <thiemann@informatik.uni-tuebingen.de>:
+ * ppc-opc.c (insert_mbe): Handle wrapping bitmasks.
+ (extract_mbe): Likewise.
+
+Wed Aug 12 11:11:34 1998 Jeffrey A Law (law@cygnus.com)
+
+ * m10300-opc.c: Fix typo in udf20 .. udf25 instruction opcodes.
+
+ * m10300-opc.c: First cut at UDF instructions.
+
+Mon Aug 10 14:08:22 1998 Doug Evans <devans@canuck.cygnus.com>
+
+ * m32r-opc.c: Regenerate (remove semantic descriptions).
+
+Mon Aug 10 12:51:12 1998 Catherine Moore <clm@cygnus.com>
+
+ * arm-dis.c (print_insn_big_arm): Fix indentation.
+ (print_insn_little_arm): Likewise.
+
+Sun Aug 9 20:17:28 1998 Catherine Moore <clm@cygnus.com>
+
+ * arm-dis.c (print_insn_big_arm): Check for thumb symbol
+ attributes.
+ (print_insn_little_arm): Likewise.
+
+Mon Aug 3 12:43:16 1998 Doug Evans <devans@seba.cygnus.com>
+
+ Move all global state data into opcode table struct, and treat
+ opcode table as something that is "opened/closed".
+ * cgen-asm.c (all fns): New first arg of opcode table descriptor.
+ (cgen_asm_init): Delete.
+ (cgen_set_parse_operand_fn): New function.
+ * cgen-dis.c (all fns): New first arg of opcode table descriptor.
+ (cgen_dis_init): Delete.
+ * cgen-opc.c (all fns): New first arg of opcode table descriptor.
+ (cgen_current_{opcode_table_mach,endian}): Delete.
+ * m32r-asm.c,m32r-dis.c,m32r-opc.c,m32r-opc.h: Regenerate.
+
+Thu Jul 30 21:41:10 1998 Frank Ch. Eigler <fche@cygnus.com>
+
+ * d30v-opc.c (d30v_opcode_table): Add new "LKR" flag to some
+ instructions.
+
+Tue Jul 28 11:00:09 1998 Jeffrey A Law (law@cygnus.com)
+
+ * m10300-opc.c: Add entries for "no_match_operands" field in
+ the opcode table.
+
+Fri Jul 24 11:41:37 1998 Doug Evans <devans@canuck.cygnus.com>
+
+ * m32r-asm.c,m32r-opc.c: Regenerate (-Wall cleanups).
+
+Tue Jul 21 13:41:07 1998 Doug Evans <devans@seba.cygnus.com>
+
+ * m32r-opc.h,m32r-opc.c,m32r-asm.c,m32r-dis.c: Regenerate.
+
+Mon Jul 13 14:53:59 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
+
+ * i386-dis.c (ckprefix): Handle fwait specially only when it isn't
+ the first prefix.
+ (dofloat): Correct test for fnstsw. Print `fnstsw %ax' rather
+ than `fnstsw %eax'.
+ (OP_J): Remove unnecessary subtraction when 16-bit displacement
+ will be masked later.
+
+Thu Jul 2 17:11:27 1998 Doug Evans <devans@seba.cygnus.com>
+
+ * m32r-opc.h (CGEN_MIN_INSN_SIZE): New #define.
+
+Wed Jul 1 16:11:16 1998 Doug Evans <devans@seba.cygnus.com>
+
+ * m32r-asm.c,m32r-dis.c,m32r-opc.c,m32r-opc.h: Regenerate.
+
+Fri Jun 26 11:08:55 1998 Jeffrey A Law (law@cygnus.com)
+
+ * m10300-dis.c: Only recognize instructions from the currently
+ selected machine.
+ * m10300-opc.c: Add field indicating the particular variant of
+ the mn10300 each instruction is available on.
+
+Fri Jun 26 12:04:21 1998 Ian Lance Taylor <ian@cygnus.com>
+
+ * configure.in: For bfd_vax_arch, build vax-dis.lo.
+ * Makefile.am: Rebuild dependencies.
+ (CFILES): Add vax-dis.c.
+ (ALL_MACHINES): Add vax-dis.lo.
+ * aclocal.m4: Rebuild with current libtool.
+ * configure, Makefile.in: Rebuild.
+
+Fri Jun 26 12:03:20 1998 Klaus Kaempf <kkaempf@progis.de>
+
+ * vax-dis.c: New file, from work by Pauline Middelink
+ <middelin@polyware.iaf.nl>.
+ * disassemble.c (ARCH_vax): Define if ARCH_all.
+ (disassembler): Add case for ARCH_vax.
+ * makefile.vms: Support compilation on vms/vax.
+
+Tue Jun 23 19:42:18 1998 Mark Alexander <marka@cygnus.com>
+
+ * m10200-dis.c (print_insn_mn10200): Fix various non-portabilities
+ related to sign extension and the size of ints.
+
+Tue Jun 23 10:59:26 1998 Jeffrey A Law (law@cygnus.com)
+
+ * m10300-opc.c: Support one operand "asr", "lsr" and "asl"
+ instructions. Support (sp) addressing mode by expanding it into
+ (0,sp).
+
+Sat Jun 20 14:46:20 1998 Frank Ch. Eigler <fche@cygnus.com>
+
+ * mips-dis.c (_print_insn_mips): Fix argument interchange typo.
+
+Fri Jun 19 09:16:42 1998 Mark Alexander <marka@cygnus.com>
+
+ * m10200-dis.c (print_insn_mn10200): Recognize 'break' pseudo-op.
+
+1998-06-18 Ulrich Drepper <drepper@cygnus.com>
+
+ * i386-dis.c: Add support for fxsave, fxrstor, sysenter and
+ sysexit.
+
+Thu Jun 18 10:22:24 1998 John Metzler <jmetzler@cygnus.com>
+
+ * mips-dis.c (print_insn_little_mips): Previously, instruction
+ printing references the symbol table to determine whether the
+ instruction resides in a block regular instructions or mips16
+ instructions. However, when the disassembler gets used in other
+ environments where the symbol table is not present, we no longer
+ rely in the symbol table, rather, use the low bit of the
+ instructions address to guess. There should be no change for usage
+ of the disassembler in host based programs, gdb, objdump.
+ (print_insn_big_mips): ditto.
+ (print_insn_mips): ditto
+
+Wed Jun 17 21:19:01 1998 Mark Alexander <marka@cygnus.com>
+
+ * m10200-dis.c (print_insn_mn10200): Don't bomb on unknown opcodes.
+
+Wed Jun 17 17:49:23 1998 Jeffrey A Law (law@cygnus.com)
+
+ * m10300-opc.c (mn10300_opcodes): Change opcode for "syscall".
+
+Tue Jun 16 13:10:51 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
+
+ * i386-dis.c (index16): Add '%' to register names. Use ','
+ instead of '+'.
+
+Sat Jun 13 11:33:55 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
+
+ * i386-dis.c: Don't print opcode suffix when we can figure out the
+ size (and gas can!) by register operands, or from the default
+ size.
+ (putop): Handle 'A', 'B', 'L', 'P', 'Q', 'R' macros. Rename 'C'
+ macro to 'E'.
+ (dis386, dis386_twobyte, grps): Use new suffix macros.
+ (dis386): Correct imul Ib to imul sIb. Change jnl to jge to be
+ consistent. Add suffix for call, jmp, lcall, ljmp, iret. Reverse
+ order of cmps operands to agree with Intel docs. Correct operand
+ of aad and aam (Ib -> sIb). Change ud2b from 0fb8 to 0fb9 to
+ agree with Intel docs.
+ (print_insn_x86): Print orphan fwait before other prefixes.
+ Return correct byte count for orphan fwait with prefixes. Don't
+ print `bound' operands in reverse order.
+ (ckprefix): Stop accumulating prefixes if we get fwait.
+ (OP_DIR): Print `$' before Ap operands of ljmp, lcall.
+
+Fri Jun 12 13:40:38 1998 Tom Tromey <tromey@cygnus.com>
+
+ * po/Make-in (all-yes): If maintainer mode, depend on .pot file.
+ ($(PACKAGE).pot): Unconditionally depend on POTFILES.
+
+Fri Jun 12 11:04:06 1998 Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>
+
+ Fix problems when bfd_vma is wider than long.
+ * i386-dis.c: Make op_address and start_pc unsigned.
+ (set_op): Make parameter unsigned.
+ (print_insn_x86): Cast to bfd_vma when passing a value to
+ print_address_func.
+ * ns32k-dis.c (CORE_ADDR): Don't define.
+ (print_insn_ns32k): Change type of addr to bfd_vma. Use
+ bfd_scan_vma to read back address.
+ (print_insn_arg): Change type of addr to bfd_vma. Use sprintf_vma
+ to format it.
+ * m68k-dis.c (COERCE32): Cast to bfd_signed_vma to avoid overflow.
+ (NEXTULONG): New definition.
+ (print_insn_m68k): Avoid overflow when computing third argument of
+ print_insn_arg.
+ (print_insn_arg): Use NEXTULONG to fetch 32 bit address values.
+ Use disp instead of val to store offset values.
+ (print_indexed): Use base_disp instead of word to store base
+ displacement, to avoid overflow.
+ * m10300-dis.c (disassemble): Cast value to long when computing
+ pc-relative address, to get correct sign extension.
+
+Wed Jun 10 15:58:37 1998 Doug Evans <devans@canuck.cygnus.com>
+
+ * m32r-opc.c: Regenerate.
+
Tue Jun 9 14:27:57 1998 Nick Clifton <nickc@cygnus.com>
* arm-opc.h (thumb_opcodes): Display 'add rx, rY, #0' insns as
0; produce error message for shifts of size 32 (or 64 for 64-bit
shifts), because the hardware doesn't support them.
-start-sanitize-r5900
-Mon Jun 1 10:27:26 1998 Jeffrey A Law (law@cygnus.com)
-
- * mips-opc.c (c.lt.s): Remove r5900 specific variant.
- (c.le.s): Likewise.
-
- * vu0.h (sqc2): Fix opcode.
-
- * mips-opc.c (rsqrt.s): Update based on r5900 ISA manual version 2.1
- (sqrt.s): Likewise.
-
-end-sanitize-r5900
-start-sanitize-vr5400
-Thu May 28 08:46:09 1998 Catherine Moore <clm@cygnus.com>
-
- * mips-opc.c (macc, maccu, macchi, macchiu, msac, msacu, msachi, msachiu):
- Change pinfo to use WR_HILO.
-
-end-sanitize-vr5400
-start-sanitize-d30v
Wed May 27 15:29:13 1998 Nick Clifton <nickc@cygnus.com>
* d30v-opc.c: Add new operand: Ra3. Change SHORT_B3, SHORT_B3b,
LONG_2, LONG_2b formats to use this new operand.
-end-sanitize-d30v
Tue May 26 20:47:48 1998 Stan Cox <scox@cygnus.com>
* sparc-dis.c (compute_arch_mask): Added bfd_mach_sparc_sparclite_le.
* sparc-dis.c (print_insn_sparc): big endian instruction / little
endian data support.
-start-sanitize-d30v
Tue May 26 16:14:39 1998 Nick Clifton <nickc@cygnus.com>
* d30v-opc.c (d30v_format_table): Change definition of SHORT_B3
and SHORT_B3b formats to use Rb instead of Ra.
-
+
Add FLAG_MUL16 to MUL2XH opcode.
Add FLAG_ADDSUBppp to SRC and SATHp opcodes to implement extension
to existing 1.1.1 parallelisation prohibition procedure.
-end-sanitize-d30v
Fri May 22 16:00:00 1998 Doug Evans <devans@canuck.cygnus.com>
- * cgen-asm.in (insert_normal): Handle empty fields and 64 bit hosts.
- * cgen-dis.in (extract_normal): Likewise.
* m32r-asm.c,m32r-dis.c: Regenerate.
-start-sanitize-sky
-Fri May 22 11:44:10 1998 Doug Evans <devans@canuck.cygnus.com>
-
- * dvp-opc.c (parse_dotdest): Missing dest -> xyzw.
-
-end-sanitize-sky
-start-sanitize-r5900
-Wed May 20 00:22:27 1998 Jeffrey A Law (law@cygnus.com)
-
- * mips-opc.c (multu1): Add two operand variant for the r5900.
-
-end-sanitize-r5900
Tue May 19 17:36:08 1998 Ian Lance Taylor <ian@cygnus.com>
* mips-dis.c (print_mips16_insn_arg): Handle type ']' correctly
with a shift count of 0.
-start-sanitize-r5900
-Mon May 18 14:27:06 1998 Frank Ch. Eigler <fche@cygnus.com>
-
- * mips-opc.c (mult1): Add two-operand variety of mult1 for R5900.
-
-Mon May 18 11:44:00 1998 Jeffrey A Law (law@cygnus.com)
-
- * mips-dis.c (print_insn_arg): Handle ';' opcode completer.
- (_print_insn_mips): Likewise.
- * vu0.h (vopmula, vopmsub): Correctly handle opcode/operand
- completers.
-
-end-sanitize-r5900
Fri May 15 14:58:31 1998 Doug Evans <devans@seba.cygnus.com>
* cgen-opc.c (cgen_hw_lookup_by_name): Renamed from cgen_hw_lookup.
(cgen_hw_lookup_by_num): New function.
-start-sanitize-m32rx
- * m32r-opc.c, m32r-opc.h: Regenerate, delete h-abort.
-
-end-sanitize-m32rx
Wed May 13 17:03:59 1998 Doug Evans <devans@canuck.cygnus.com>
* m32r-asm.c: Regenerate (handle uppercase HIGH/SHIGH/LOW/SDA).
* sparc-dis.c (print_insn_sparc): Always fetch instructions
as big-endian on SPARClite.
-start-sanitize-m32rx
-Tue May 12 13:39:51 1998 Nick Clifton <nickc@cygnus.com>
-
- * m32r-opc.c: Regenerated - SPECIAL attribute added to some
- insns.
- * m32r-opc.h: Regenerated - SPECIAL attribute added to some
- insns.
-
-end-sanitize-m32rx
-start-sanitize-d30v
Tue May 12 11:46:31 1998 Richard Henderson <rth@cygnus.com>
* d30v-opc.c (pre_defined_register): Remove alias for r0.
-end-sanitize-d30v
-start-sanitize-r5900
-Mon May 11 13:12:15 1998 Frank Ch. Eigler <fche@cygnus.com>
-
- * mips-opc.c (break): Added 20-bit single-operand break
- instruction for R5900 only.
-
-end-sanitize-r5900
Sun May 10 22:37:22 1998 Jeffrey A Law (law@cygnus.com)
* po/Make-in (install-info): New target.
* mips-dis.c (print_insn_arg): Implement 'q' operand format used
for above optional argument.
-start-sanitize-cygnus
-Wed May 6 14:47:17 1998 Doug Evans <devans@seba.cygnus.com>
-
- * cgen.sh: s/@ARCH@/${ARCH}/ in opc.h generation.
- * m32r-opc.h: Regenerate.
-
-end-sanitize-cygnus
Wed May 6 15:30:06 1998 Klaus Kaempf <kkaempf@progis.de>
* makefile.vms: Run dec c with /nodebug.
* opintl.h (_): Define as dgettext.
-start-sanitize-cygnus
-Fri May 1 13:47:42 1998 Doug Evans <devans@canuck.cygnus.com>
-
- * configure.in: Add support for --enable-cgen-maint.
- * Makefile.am (M32R_DEPS): New variable.
- (m32r-opc.h,m32r-opc.c,m32r-asm.c,m32r-dis.c): Update dependencies.
- * aclocal.m4: Regenerate.
- * Makefile.in: Regenerate.
- * configure: Regenerate.
-
- * Makefile.am (CGENFILES): Add minsn.scm.
-
-end-sanitize-cygnus
Tue Apr 28 14:12:12 1998 Nick Clifton <nickc@cygnus.com>
* cgen-asm.c: Internationalised.
-start-sanitize-cygnus
- * cgen-asm.in: Internationalised.
- * cgen-opc.in: Internationalised.
-end-sanitize-cygnus
* m32r-asm.c: Internationalised.
* m32r-dis.c: Internationalised.
* m32r-opc.c: Internationalised.
* arc-opc.c: Internationalised.
* arm-dis.c: Internationalised.
* cgen-asm.c: Internationalised.
-start-sanitize-d30v
* d30v-dis.c: Internationalised.
-end-sanitize-d30v
* dis-buf.c: Internationalised.
-start-sanitize-sky
- * dvp-dis.c: Internationalised.
- * dvp-opc.c: Internationalised.
-end-sanitize-sky
* h8300-dis.c: Internationalised.
* h8500-dis.c: Internationalised.
* i386-dis.c: Internationalised.
* cgen-opc.c (cgen_current_opcode_table): Renamed from ..._data.
(cgen_set_cpu,cgen_hw_lookup,cgen_insn_count): Update.
(cgen_macro_insn_count): New function.
- * cgen-opc.in (@arch@_cgen_lookup_insn): New arg alias_p.
- All callers updated. Sanity check result of extract fn.
- (@arch@_cgen_get_insn_operands): Change result type to void.
- Delete args insn_value, length. New arg fields. All callers updated.
- (@arch@_cgen_lookup_get_insn_operands): New function.
* m32r-opc.h,m32r-opc.c,m32r-asm.c,m32r-dis.c: Regenerate.
Fri Apr 24 16:07:57 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
* i386-dis.c (OP_DSSI): Print segment override.
-start-sanitize-r5900
-Thu Apr 23 12:32:07 1998 Frank Ch. Eigler <fche@cygnus.com>
-
- * mips-opc.c (msub.s): Correct mask pattern for disassembly.
-
-end-sanitize-r5900
-start-sanitize-r5900
-Mon Apr 20 19:11:55 1998 Frank Ch. Eigler <fche@cygnus.com>
-
- * mips-opc.c (madd.s): Correct mask pattern for disassembly.
-
-end-sanitize-r5900
-start-sanitize-r5900
-Sat Apr 18 00:29:18 1998 Jeffrey A Law (law@cygnus.com)
-
- * vu0.h (vlqd, vlqi): Update per revised specs.
-
-end-sanitize-r5900
-start-sanitize-sky
-Thu Apr 16 11:44:59 1998 Doug Evans <devans@canuck.cygnus.com>
-
- * dvp-opc.c (parse_vif_unpackloc,insert_vif_unpackloc): Delete.
- (vif_operands): Update.
- (vif_get_unpackloc): Delete.
- (state_vif_unpackloc{,_star_p}): Delete.
- (dvp_opcode_init_parse): Update.
- (vif_unpack_len_value): Avoid divide by zero.
-
-end-sanitize-sky
-start-sanitize-r5900
-Wed Apr 15 10:30:07 1998 Frank Ch. Eigler <fche@cygnus.com>
-
- * vu0.h: Specs changed for VCALLMSR bit pattern.
- * mips-dis.c: (print_insn_arg) Matching change.
-
-end-sanitize-r5900
Mon Apr 13 16:59:39 1998 Nick Clifton <nickc@cygnus.com>
* arm-dis.c (print_insn_arm): Add "_all" extension to 'C'
- operator.
+ operator.
Mon Apr 13 16:50:27 1998 Ian Lance Taylor <ian@cygnus.com>
* aclocal.m4: Rebuild with new libtool.
* configure, Makefile.in: Rebuild.
-start-sanitize-r5900
-Mon Apr 13 16:02:02 1998 Frank Ch. Eigler <fche@cygnus.com>
-
- * vu0.h: Corrected bit pattern for VMAXI opcode.
-
-end-sanitize-r5900
Fri Apr 10 18:14:31 1998 Doug Evans <devans@canuck.cygnus.com>
* m32r-opc.c: Regenerate.
-start-sanitize-sky
-Mon Apr 6 17:16:48 1998 Doug Evans <devans@canuck.cygnus.com>
-
- * dvp-opc.c (vif_macros): Tweak unpackloc operand.
- (dvp_expand_macro): Implement.
- (insert_vif_datalen): Record value with max+1 -> 0 conversion.
- (vif_unpack_len): Perform 0 -> max+1 conversion on `wl' value.
-
-end-sanitize-sky
Sun Apr 5 16:04:39 1998 H.J. Lu <hjl@gnu.org>
* Makefile.am (stamp-lib): Check that .libs/libopcodes.a exists
* m32r-opc.c: Use signed immediate values for CMPUI instruction.
-start-sanitize-m32rx
-Thu Apr 2 16:44:23 1998 Nick Clifton <nickc@cygnus.com>
-
- * m32r-opc.c: Fix bit patterns for SAT and SATB.
-
-end-sanitize-m32rx
Wed Apr 1 16:20:27 1998 Ian Dall <Ian.Dall@dsto.defence.gov.au>
* ns32k-dis.c (bit_extract_simple): New function to extract bits
from an arbitrary valid buffer instead of fetching them on demand
- using fetch_data().
+ using fetch_data().
(invalid_float): use bit_extract_simple() instead of bit_extract().
-start-sanitize-m32rx
-Wed Apr 1 14:57:54 1998 Nick Clifton <nickc@cygnus.com>
-
- * m32r-opc.c: Fix SATB bit pattern. Add extra control registers.
- * m32r-opc.h: Add extra control registers.
-
-end-sanitize-m32rx
Tue Mar 31 11:09:08 1998 Ian Lance Taylor <ian@cygnus.com>
From H.J. Lu <hjl@gnu.org>:
* Branched binutils 2.9.
-start-sanitize-d30v
Mon Mar 30 15:18:00 1998 Ken Raeburn <raeburn@cygnus.com>
* d30v-dis.c (print_insn_d30v): Don't use uninitialized "num" when
disassembling last 4 bytes of a section.
-end-sanitize-d30v
Fri Mar 27 18:08:13 1998 Ian Lance Taylor <ian@cygnus.com>
Fix some gcc -Wall warnings:
* arc-dis.c (print_insn): Add casts to avoid warnings.
* cgen-opc.c (cgen_keyword_lookup_name): Likewise.
* d10v-dis.c (dis_long, dis_2_short): Likewise.
-start-sanitize-sky
- * dvp-opc.c (issymchar, SKIP_BLANKS): Likewise.
- (parse_dotdest, parse_dotdest1, u_parse_sdest): Likewise.
- (parse_bc, parse_vfreg, parse_accdest): Likewise.
- (parse_ffstreg, parse_vif_mode): Likewise.
-end-sanitize-sky
* m10200-dis.c (disassemble): Likewise.
* m10300-dis.c (disassemble): Likewise.
* ns32k-dis.c (print_insn_ns32k): Likewise.
* cgen-dis.c (build_dis_hash_table): Remove used local variables.
* cgen-opc.c (cgen_keyword_search_next): Likewise.
* d10v-dis.c (dis_long, dis_2_short): Likewise.
-start-sanitize-d30v
* d30v-dis.c (print_insn_d30v, lookup_opcode): Likewise.
-end-sanitize-d30v
-start-sanitize-sky
- * dvp-dis.c (print_dma, print_vif, print_gif): Likewise.
- * dvp-opc.c (parse_dest1, print_uflags): Likewise.
- (parse_gif_nloop, dvp_opcode_init_tables): Likewise.
-end-sanitize-sky
* ns32k-dis.c (bit_extract, print_insn_ns32k): Likewise.
-start-sanitize-tic80
* tic80-dis.c (print_one_instruction): Likewise.
-end-sanitize-tic80
* w65-dis.c (print_operand): Likewise.
* z8k-dis.c (fetch_data): Likewise.
* a29k-dis.c: Add return type for find_byte_func_type.
* arc-opc.c: Include <stdio.h>. Remove declarations of
insert_multshift and extract_multshift.
-start-sanitize-d30v
* d30v-dis.c (lookup_opcode): Parenthesize assignments in
conditionals.
(extract_value): Fully parenthesize expression.
-end-sanitize-d30v
-start-sanitize-sky
- * dvp-opc.c: Include <ctype.h>.
- (print_sdest): Add default case to switch.
-end-sanitize-sky
* h8500-dis.c (print_insn_h8500): Initialize local variables.
* h8500-opc.h (h8500_table): Fully bracket initializer.
* w65-opc.h (optable): Likewise.
* mips-opc.c: Add "sync.l" and "sync.p".
-start-sanitize-sky
-Thu Mar 26 13:27:37 1998 Doug Evans <devans@canuck.cygnus.com>
-
- * dvp-opc.c (extract_vif_datalen): Rewrite.
- (vif_insn_len): Perform 0->max+1 conversion for direct length.
-
-Wed Mar 25 13:32:36 1998 Doug Evans <devans@canuck.cygnus.com>
-
- * dvp-dis.c (print_insn): Print unpack address in hex.
- * dvp-opc.c (parse_vif_mpgloc): Renamed from parse_vif_mpgloc_star.
- Don't skip over '*', just record it.
- (insert_vif_mpgloc): Don't update state_vif_mpgloc if '*' value.
- (parse_vif_unpackloc): Renamed from parse_vif_unpackloc_star.
- Don't skip over '*', just record it.
- (insert_vif_unpackloc): Don't update state_vif_unpackloc if '*' value.
- (vif_operands): Delete VIF_MPGLOC_STAR,VIF_UNPACKLOC_STAR entries.
- (vif_opcodes): Likewise.
- (state_vif_{mpg,unpack}loc_star_p): New static locals.
- (vif_macros,vif_macro_count): New globals.
- (vif_unpack_len_value): New arguments wl,cl. All callers updated.
- (vif_set_{mpg,unpack}loc): Delete. All callers updated.
- (vif_get_wl_cl): New function.
- (dvp_opcode_init_parse): Init mpgloc,unpackloc state.
-
-end-sanitize-sky
Wed Mar 25 14:32:48 1998 Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>
* m68k-dis.c (print_insn_m68k): Use info->mach to select the
symbol. Fix indentation.
(print_insn_little_arm): Likewise.
-start-sanitize-r5900
-Tue Mar 24 18:11:13 1998 Jeffrey A Law (law@cygnus.com)
-
- * vu0.h (cfc2, ctc2): Add variants with ".i" and ".ni"
- opcode extensions.
-
-end-sanitize-r5900
-start-sanitize-m32rx
-Mon Mar 23 11:32:11 1998 Nick Clifton <nickc@cygnus.com>
-
- * m32r-opc.c (m32r_cgen_insn_table_entries): Fix SATH bit pattern
- (PR15418).
-
-end-sanitize-m32rx
-start-sanitize-sky
-Mon Mar 23 09:45:04 1998 Doug Evans <devans@canuck.cygnus.com>
-
- * dvp-opc.c (vif_operand_datalen_special): New global.
-
-end-sanitize-sky
-start-sanitize-r5900
-Sun Mar 22 13:00:14 1998 Jeffrey A Law (law@cygnus.com)
-
- * vu0.h (vcallms): Use 'O' for call target operand.
- * mips-dis.c (print_insn_arg): Handle 'O'.
-
-end-sanitize-r5900
Fri Mar 20 18:55:18 1998 Ian Lance Taylor <ian@cygnus.com>
* configure.in: Use AM_DISABLE_SHARED.
* aclocal.m4, configure: Rebuild with libtool 1.2.
-start-sanitize-r5900
-Fri Mar 20 09:01:31 1998 Jeffrey A Law (law@cygnus.com)
-
- * mips-dis.c: Change '%' to '#' to avoid conflict with vr5400
- support.
- * vu0.h: Likewise.
-
-end-sanitize-r5900
Thu Mar 19 15:46:53 1998 Nick Clifton <nickc@cygnus.com>
These patches are courtesy of Jonathan Walton and Tony Thompson
(athompso@cambridge.arm.com).
-
+
* arm-dis.c (print_insn_thumb): Ignore bottom two bits of PC
relative addresses.
* arm-opc.h (thumb_opcodes): Annotate PC relative addresses with
both the offset and the label closest to the destination.
-start-sanitize-r5900
-Thu Mar 19 13:53:25 1998 Jeffrey A Law (law@cygnus.com)
-
- * vu0.h: New file with cop2/vu0 instructions.
- * mips-opc.c: Include vu0.h.
- * mips-dis.c (print_insn_arg): Handle new args 0-9, +, -, %, K, &,
- J, Q, X, and U.
- (print_insn_mips): Do not emit a tab after an instruction if the
- first arg is an instruction completer (&). If the next arg is an
- escape character (%), then print the next arg verbatim.
- * Makefile.am (mips-opc.lo): Depend on vu0.h
-
-end-sanitize-r5900
-start-sanitize-sky
-Thu Mar 19 10:42:51 1998 Doug Evans <devans@canuck.cygnus.com>
-
- * dvp-opc.c (vif_opcodes): Add stcycl.
-
-Tue Mar 17 10:53:58 1998 Doug Evans <devans@canuck.cygnus.com>
-
- * dvp-dis.c (print_dma): Change length from 16 to 8.
-
-end-sanitize-sky
Sat Mar 14 23:47:14 1998 Doug Evans <devans@seba.cygnus.com>
* m32r-opc.h: Regenerate.
-start-sanitize-sky
-Thu Mar 12 09:18:54 1998 Doug Evans <devans@canuck.cygnus.com>
-
- * dvp-opc.c (print_dest1): Print dest spec again.
- (print_vfreg,print_accdest): Likewise.
- (vif_unpack_len): Round result up to word boundary.
-
-end-sanitize-sky
-start-sanitize-vr4320
-Tue Mar 10 15:57:23 1998 Gavin Koch <gavin@cygnus.com>
-
- * mips-opc.c ("clz","dclz"): Added the 4320 versions.
-
-Mon Mar 9 15:22:06 1998 Gavin Koch <gavin@cygnus.com>
-
- * mips-opc.c ("macc*","mul*"): Added the 4320 versions
- of these.
-
-end-sanitize-vr4320
-start-sanitize-sky
-Fri Mar 6 11:27:53 1998 Doug Evans <devans@canuck.cygnus.com>
-
- * dvp-dis.c (print_gif): Fix length calcs for gifimage.
- (print_insn): Do mask comparison on proper opcode word.
- Print unsigned values in hex.
- * dvp-opc.c (u_parse_sdest): Return -1 if dest missing.
- (parse_bc): Catch missing dest.
- (parse_vfreg): Replace atoi call with strtol.
- (parse_{bcftreg,ffstreg,freg,ireg,vi01,gif_prim,gif_nloop}): Likewise.
- (parse_bcftreg,parse_ffstreg): Handle missing dest.
- (extract_gif_eop): New function.
- (gif_operands): Update eop entry.
- (VGIFOP,VGIFNREGS): Fix calcs.
- (extract_gif_prim): Set *pinvalid to 1 if prim not used.
- (gif_regs): Add entry for unused 11 case.
- (print_gif_regs): Print empty list instead of nothing.
- (extract_gif_nloop): Fix value calc.
- (print_gif_nloop): Always print value, even if 0.
- (insert_vif_wlcl,extract_vif_wlcl): New functions.
- (vif_operands): Use them for wl,cl fields.
- (state_vif_wl,state_vif_cl): New static locals.
- (parse_vif_mode): Handle numeric args.
- (vif_unpack_len_value,vif_unpack_len): New functions.
- (vif_insn_len): Call vif_unpack_len.
-
-end-sanitize-sky
Wed Mar 4 12:08:14 1998 Doug Evans <devans@canuck.cygnus.com>
* m32r-opc.h,m32r-opc.c,m32r-asm.c,m32r-dis.c: Regenerate.
-Tue Mar 3 18:51:22 1998 Doug Evans <devans@seba.cygnus.com>
-
- * cgen-asm.in: Move insertion of generated routines to top of file.
- (insert_normal): Add prototype. Delete `shift' arg.
- * cgen-dis.in: Move insertion of generated routines to top of file.
- (extract_normal): Add prototype. Delete `shift' arg.
- (print_normal): Add prototype. Call CGEN_PRINT_NORMAL if defined.
- (print_keyword): Add prototype. Fix type of `attrs' arg.
-
-start-sanitize-vr4320
-Tue Mar 3 11:47:58 1998 Gavin Koch <gavin@cygnus.com>
-
- * mips-dis.c (_print_insn_mips) : Handle bfd_mach_mips4320.
- * mips-opc.c ("mac","dmac") : Added 4320 insns.
-
-end-sanitize-vr4320
Sat Feb 28 16:02:34 1998 Nick Clifton <nickc@cygnus.com>
* arm-dis.c (print_insn_big_arm, print_insn_little_arm): Do not
* alpha-opc.c (cvtqs) There is no such thing.
(cvttq): Missing most of the /*d variants.
-start-sanitize-r5900
-Fri Feb 27 13:16:42 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * mips-opc.c (r5900/madd.s): Takes three operands, not four. Fix
- opcode.
- (r5900/min.s): Incorrect opcode ....,101001 not ...110000.
- (r5900/msub.s): Takes three operands, not four. Fix opcode.
-
-end-sanitize-r5900
-start-sanitize-d30v
Thu Feb 26 15:53:09 1998 Michael Meissner <meissner@cygnus.com>
* d30v-opc.c (d30v_opcode_table): Indicate which instructions are
delayed branches or jumps.
-end-sanitize-d30v
-start-sanitize-sky
-Fri Feb 27 10:04:19 1998 Doug Evans <devans@canuck.cygnus.com>
-
- * dvp-opc.c (vif_operands): Add unpack[u] support.
- (vif_opcodes): Ditto.
- (*_vif_imrubits): Renamed from *_vif_imrbits.
-
-Wed Feb 25 00:27:44 1998 Doug Evans <devans@canuck.cygnus.com>
-
- * dvp-dis.c (print_insn): Handle word number.
- Handle mips address vs vu address.
- * dvp-opc.c (vif_operands): Use DVP_OPERAND_VU_ADDRESS.
- (dma_operands): Use DVP_OPERAND_MIPS_ADDRESS.
- ({insert,extract}_dma_addr): Fix word ofset.
- ({insert,print}_gif_regs): Fix encode/decode.
-
-end-sanitize-sky
Tue Feb 24 10:46:44 1998 Doug Evans <devans@canuck.cygnus.com>
* arm-dis.c (print_insn_{big,little}_arm): info->symbol changed
to *info->symbols.
* mips-dis.c (print_insn_{big,little}_mips): Likewise.
* tic30-dis.c (print_branch): Likewise.
-start-sanitize-sky
- * mips-dis.c (print_insn_little_mips): Call dvp_info_mach_type.
- * dvp-dis.c (dvp_info_mach_type): New function.
- (print_insn_dvp): Call it.
- (print_vif): Return length of 4 if mpg or direct insn so following
- insns get properly disabled.
- (print_gif): Fix word order.
- * dvp-opc.c (vif_insn_len): New argument `pcpu'. All callers updated.
- (gif_operands): Fix word order.
- (gif_opcodes): Likewise.
- ({insert,extract,print}_gif_regs): Likewise.
- (gif_regs): Add new register number/name changes.
- (dma_opcodes): Add dmarefe insn.
-end-sanitize-sky
Tue Feb 24 11:06:18 1998 Nick Clifton <nickc@cygnus.com>
Mon Feb 23 13:16:17 1998 Doug Evans <devans@seba.cygnus.com>
* cgen-asm.c: Include symcat.h.
- * cgen-dis.c,cgen-opc.c,cgen-asm.in,cgen-dis.in: Ditto.
-
+ * cgen-dis.c,cgen-opc.c: Ditto.
* m32r-asm.c,m32r-dis.c,m32r-opc.h,m32r-opc.c: Regenerate.
-start-sanitize-sky
-Mon Feb 23 09:51:39 1998 Doug Evans <devans@canuck.cygnus.com>
-
- * dvp-opc.c (extra_dma_flags): Fix typos.
- (dma_operands): Fix word numbers.
- (dma_opcodes): Likewise.
- ({insert,extract}_dma_flags): Likewise.
-
-end-sanitize-sky
Mon Feb 23 10:34:58 1998 Jeffrey A Law (law@cygnus.com)
* mips-dis.c (print_insn_arg): Do not prefix 'P' arguments with '$'.
-start-sanitize-sky
-Fri Feb 20 18:02:20 1998 Doug Evans <devans@canuck.cygnus.com>
-
- * dvp-dis.c (print_gif): Complete.
- * dvp-opc.c (gif_operands,gif_opcodes): Complete.
- (state_gif_{nregs,regs,nloop}): New static locals.
- (*_gif_*): Complete.
- (dvp_opcode_init_{parse,print}): Init gif state locals.
- (extract_vif_datalen,{insert,extract}_vif_imrbits): New functions.
- (vif_insn_len): Handle `unpack'.
- ({insert,extract}_dma_flags): Complete.
-
-end-sanitize-sky
-start-sanitize-r5900
-Fri Feb 20 01:23:16 1998 Jeffrey A Law (law@cygnus.com)
-
- * mips-opc.c (mula.s): Renamed from multa.s.
-
-end-sanitize-r5900
Thu Feb 19 16:51:13 1998 Doug Evans <devans@canuck.cygnus.com>
* m32r-opc.[ch]: Regenerate.
-start-sanitize-sky
-Thu Feb 19 02:11:39 1998 Doug Evans <devans@charmed.cygnus.com>
-
- * dvp-opc.c (dma_operands): Rewrite.
- (dma_operand_{count,addr}): New globals.
- (dma_opcodes): Rewrite. Add "dmaend" with no operands.
- (insert_dma_addr): Insert value into insn.
- (extract_dma_addr): Extract value from insn.
-
-Wed Feb 18 15:46:46 1998 Doug Evans <devans@canuck.cygnus.com>
-
- * dvp-dis.c (print_vu): Handle loi insns.
- (print_insn): Likewise.
- * dvp-opc.c (vu_lower_opcodes): Add "loi".
- (vu_operands): Make LDEST1 a FAKE operand.
- (parse_dest1): Allow elided argument.
- (print_dest1): Don't print the argument.
-
-Tue Feb 17 18:48:25 1998 Doug Evans <devans@canuck.cygnus.com>
-
- * dvp-opc.c (parse_vfreg): Dest spec is optional.
- (print_vfreg): Don't print dest spec.
- (parse_accdest): Dest spec is optional.
- (print_accdest): Don't print dest spec.
-
-end-sanitize-sky
Tue Feb 17 17:14:50 1998 Doug Evans <devans@seba.cygnus.com>
- * Makefile.am (CGENFILES): Update.
- * Makefile.in: Regenerate.
- * cgen-asm.in (insert_normal): Result is error message now.
- Validate value to be inserted.
- (insert_insn_normal): Result is error message now.
- (@arch@_cgen_assemble_insn): Update.
* cgen-asm.c (cgen_parse_{signed,unsigned}_integer): Delete min,max
arguments. Don't perform validation here.
* m32r-asm.c,m32r-dis.c,m32r-opc.c: Regenerate.
Fri Feb 13 14:26:06 1998 Doug Evans <devans@canuck.cygnus.com>
- * cgen-opc.in (@arch@_cgen_get_insn_operands): Handle empty
- operand instance list.
* m32r-opc.c: Regenerate.
Fri Feb 13 14:53:02 1998 Ian Lance Taylor <ian@cygnus.com>
Fri Feb 13 09:50:32 1998 Nick Clifton <nickc@cygnus.com>
- * m32r-opc.c: Regenerate.
- * m32r-opc.h: Regenerate.
+ * m32r-opc.c: Regenerate.
+ * m32r-opc.h: Regenerate.
Thu Feb 12 11:01:40 1998 Doug Evans <devans@canuck.cygnus.com>
- * cgen-opc.in (@arch@_cgen_lookup_insn): New argument alias_p.
- Ignore ALIAS insns if asked to.
- (@arch@_cgen_get_insn_operands): Pass 0 for alias_p, NULL for insn.
* m32r-opc.c: Regenerate.
-start-sanitize-sky
- * dvp.opc.c: Nicely format opcode tables.
- (vu_operands): New element UFLAGS.
- (parse_uflags,print_uflags): New functions.
- (vu_upper_opcodes): Add UFLAGS to all insns.
-
-end-sanitize-sky
Thu Feb 12 03:41:00 1998 J"orn Rennecke <amylaar@cygnus.co.uk>
Fix rac to accept only a0:
Wed Feb 11 18:58:34 1998 Doug Evans <devans@seba.cygnus.com>
- * cgen-opc.in: New file.
- * cgen.sh: Translate @ARCH@. Cat cgen-opc.in into @arch@-opc.c.
- * Makefile.am (CGENFILES): Add cgen-opc.in.
- * Makefile.in: Regenerate.
-
* cgen-opc.c (cgen_set_cpu): Delete init of hw list `next' chain.
(cgen_hw_lookup): Make result const.
-
- * cgen-dis.in (*): Use PTR instead of void *.
- (print_insn): Delete unused vars `i', `syntax'.
-
* m32r-opc.h, m32r-opc.c, m32r-asm.c, m32r-dis.c: Regenerate.
-start-sanitize-sky
-Tue Feb 10 14:56:24 1998 Doug Evans <devans@canuck.cygnus.com>
-
- * dvp-opc.c (*): pke,gpuif renamed to vif,gif.
- (vif_opcodes): Update renamed insns.
- * dvp-dis.c (*): Likewise.
-
-end-sanitize-sky
Sat Feb 7 15:30:27 1998 Ian Lance Taylor <ian@cygnus.com>
* configure, aclocal.m4: Rebuild with new libtool.
-start-sanitize-d30v
Thu Feb 5 17:56:10 1998 Michael Meissner <meissner@cygnus.com>
* d30v-opc.c (repeat{,i} instructions): Repeat/repeati
instructions use a PC relative branch, not absolute.
-end-sanitize-d30v
Wed Feb 4 19:17:37 1998 Ian Lance Taylor <ian@cygnus.com>
* configure.in: Set libtool_enable_shared rather than
(ALL_MACHINES): Add tic30-dis.lo.
* configure, Makefile.in: Rebuild.
-start-sanitize-m32rx
-Mon Feb 2 11:04:08 1998 Nick Clifton <nickc@cygnus.com>
-
- * m32r-opc.c, m32r-opc.h, m32r-asm.c m32r-dis.c: Newly generated
- versions after updates to m32r.cpu to remove mulwhi-a, mulwlo-a,
- macwhi-a and macwlo-a instructions.
-
-end-sanitize-m32rx
-start-sanitize-sky
-Fri Jan 30 17:39:21 1998 Ian Carmichael <iancarm@cygnus.com>
-
- * dvp-opc.c, fixed encoding of a bunch of instructions to
- be consistent with the asmvu assembler (and inconsistent
- with the specification).
-
-Thu Jan 29 18:14:56 1998 Ian Carmichael <iancarm@cygnus.com>
-
- * dvp-opc.c, fixed order of pkemscal/pkemscalf instructions
- in the opcode table. The pkemscalf instruction must come first.
-
-Thu Jan 29 16:47:24 1998 Ian Carmichael <iancarm@cygnus.com>
-
- * dvp-opc.c, MAXIi should be VUOP6(0x1d) instead of 0x2d.
-
-end-sanitize-sky
Thu Jan 29 13:02:56 1998 Doug Evans <devans@canuck.cygnus.com>
* m32r-opc.h (HAVE_CPU_M32R): Define.
-start-sanitize-sky
-Wed Jan 28 13:46:19 1998 Doug Evans <devans@canuck.cygnus.com>
-
- * dvp-dis.c, dvp-opc.c: New files.
- * configure.in: Compile them if bfd_dvp_arch, as well as mips.
- * configure: Regenerate.
- * Makefile.am (ALL_MACHINES): Add dvp-{dis,opc}.lo.
- (dvp-dis.lo,dvp-opc.lo): Add rules for.
- (mips-dis.lo): Compile with @archdefs@.
- * Makefile.in: Regenerate.
- * disassemble.c: Define ARCH_mips ifdef ARCH_dvp.
- * mips-dis.c (print_insn_little_mips): Check for DVP insns.
-
-end-sanitize-sky
Wed Jan 28 09:55:03 1998 Nick Clifton <nickc@cygnus.com>
* v850-opc.c (insertion routines): If both alignment and size is
(print_operand): If there's a reloc, don't calculate the
address because they could be in different sections.
-start-sanitize-cygnus
-Thu Jan 22 16:10:32 1998 Doug Evans <devans@seba.cygnus.com>
-
- * cgen.sh: Rewrite to be like simulator's version.
- * Makefile.am (cgen): Update call to cgen.sh.
- * Makefile.in: Regenerate
-
-end-sanitize-cygnus
Fri Jan 16 15:29:11 1998 Jim Blandy <jimb@zwingli.cygnus.com>
* mips-opc.c (mips_builtin_opcodes): Move 4010's "addciu"
4010 these days. If object files someday indicate which processor
variant they're intended for, we can do a better job at this.
-start-sanitize-r5900
-Tue Jan 13 09:21:56 1998 Jeffrey A Law (law@cygnus.com)
-
- * mips-opc.c (c.lt.s): Add r5900 variant.
- (c.le.s): Likewise.
-
-end-sanitize-r5900
Mon Jan 12 14:43:54 1998 Doug Evans <devans@seba.cygnus.com>
* cgen-asm.c (build_asm_hash_table): Traverse compiled in table using
* cgen-opc.c: Clean up pass over `struct foo' usage.
(cgen_keyword_lookup_value): Handle "" entry.
(cgen_keyword_add): Likewise.
-start-sanitize-cygnus
- * Makefile.am: Add cgen support.
- * Makefile.in: Regenerate.
- * configure.in: Add cgen support.
- * configure: Regenerate.
- * aclocal.m4: Regenerate.
- * cgen.sh, cgen-asm.in, cgen-dis.in: New files.
-end-sanitize-cygnus
Mon Dec 22 12:37:06 1997 Ian Lance Taylor <ian@cygnus.com>
* m68k-opc.c (halt, pulse): Enable them on the 68060.
-start-sanitize-tic80
Tue Dec 16 15:22:53 1997 Fred Fish <fnf@cygnus.com>
* tic80-opc.c (tic80_opcodes): Revert change that put the 32 bit
PC relative offset forms before the 15 bit forms. An assembler command
line option now chooses the default.
-end-sanitize-tic80
-start-sanitize-r5900
-Tue Dec 16 13:24:22 1997 Jeffrey A Law (law@cygnus.com)
-
- * mips-opc.c: Add many missing r5900 instructions.
-
-end-sanitize-r5900
-start-sanitize-d30v
Tue Dec 16 15:22:51 1997 Michael Meissner <meissner@cygnus.com>
* d30v-opc.c (d30v_opcode_table): Set new flags bits
FLAG_{2WORD,MUL{16,32},ADDSUBppp}, in appropriate instructions.
-end-sanitize-d30v
1997-12-15 Brendan Kehoe <brendan@lisa.cygnus.com>
* configure: Only build libopcodes shared if --enable-shared's value
original source of this bit of code. It's not clear what the best fix
would be, though.
-start-sanitize-r5900
-Mon Dec 15 12:43:36 1997 Jeffrey A Law (law@cygnus.com)
-
- * mips-opc.c (mtpc, mfpc, mtps, mfps): Add r5900 variants.
-end-sanitize-r5900
-start-sanitize-tic80
Fri Dec 12 11:57:04 1997 Fred Fish <fnf@cygnus.com>
* tic80-opc.c (OFF_SL_PC, OFF_SL_BR): Minor formatting change.
(tic80_opcodes): Reorder table entries to put the 32 bit PC relative
offset forms before the 15 bit forms, to default to the long forms.
-end-sanitize-tic80
Fri Dec 12 01:32:30 1997 Richard Henderson <rth@cygnus.com>
* alpha-opc.c (cvttq/*u*): Remove, as that suffix is invalid.
* arm-dis.c (print_insn_little_arm): Prevent examination of stored
symbol if none is present.
(print_insn_big_arm): Prevent examination of stored symbol if
- none is present.
+ none is present.
Thu Oct 23 21:13:37 1997 Fred Fish <fnf@cygnus.com>
-
+
* d10v-opc.c (d10v_opcodes): Correct entry for RTE.
-
+
Mon Dec 8 11:21:07 1997 Nick Clifton <nickc@cygnus.com>
* disassemble.c: Remove disasm_symaddr() function.
* m68k-dis.c (print_insn_m68k): Handle special case of lpstop,
which has a two word opcode with a one word argument.
-start-sanitize-d30v
Sun Nov 23 22:25:21 1997 Michael Meissner <meissner@cygnus.com>
* d30v-opc.c (d30v_opcode_table, case cmpu): Immediate field is
unsigned, not signed.
(d30v_format_table): Add SHORT_CMPU cases for cmpu.
-end-sanitize-d30v
-Wed Nov 19 17:42:35 1997 Richard Henderson <rth@cygnus.com>
-
- * sh-dis.c (print_insn_shx): Recognize all sh4 additions.
- * sh-opc.h (fmov): Add @<REG_M>+,<DX_REG_N> variant for sh4.
- (ftrv): Slay the cut-and-paste monster.
-
Tue Nov 18 23:10:03 1997 J"orn Rennecke <amylaar@cygnus.co.uk>
* d10v-dis.c (print_operand):
sh-opc.h (sh_table): Remove ftst/nan.
-start-sanitize-vr5400
-Mon Nov 3 13:23:15 1997 Ken Raeburn <raeburn@cygnus.com>
-
- * mips-opc.c (dror32, dror, rzu.ob): Fix bugs in encoding.
- (c.*.ob, mula.ob, mull.ob, muls.ob, mulsl.ob): Put 'k' version
- last.
- * mips-dis.c (print_insn_arg): Handle VR5400 operand types.
-
-end-sanitize-vr5400
-start-sanitize-tx49
-Wed Oct 29 15:10:56 1997 Gavin Koch <gavin@cygnus.com>
-
- * mips-opc.c (deret,dmult,dmultu,madd,maddu,pref,sdbbp):
- Add tx49 insns and configury.
-
-end-sanitize-tx49
Tue Oct 28 17:59:32 1997 Ken Raeburn <raeburn@cygnus.com>
* mips-opc.c (ffc, ffs): Fix mask.
-start-sanitize-d30v
Tue Oct 28 16:34:54 1997 Michael Meissner <meissner@cygnus.com>
* d30v-opc.c (pre_defined_registers): Add eit_vb, int_s, and int_m
control registers.
-end-sanitize-d30v
Mon Oct 27 22:34:03 1997 Ken Raeburn <raeburn@cygnus.com>
* mips-opc.c: Fix bug in mask for "not" pseudo-instruction.
-start-sanitize-vr5400
- Added VR5400 instructions.
- (N5): New cpu-id macro.
-end-sanitize-vr5400
(WR_HILO, RD_HILO, MOD_HILO): New macros.
Mon Oct 27 22:34:03 1997 Ken Raeburn <raeburn@cygnus.com>
values, rather than assuming that short is 16 bits.
(OP_sI, OP_J, OP_DIR): Likewise.
-start-sanitize-v850e
Thu Oct 2 13:36:45 1997 Nick Clifton <nickc@cygnus.com>
* v850-dis.c (v850_sreg_names): Use symbolic names for higher
system registers.
-end-sanitize-v850e
Wed Oct 1 16:58:54 1997 Nick Clifton <nickc@cygnus.com>
* v850-opc.c: Fix typo in comment.
* aclocal.m4: Rebuild with new libtool.
* configure: Rebuild.
-start-sanitize-v850e
Fri Sep 19 11:45:49 1997 Andrew Cagney <cagney@b1.cygnus.com>
* v850-opc.c ("cmov"): Order reg param r1, r2 not r2, r2.
-end-sanitize-v850e
Thu Sep 18 11:21:43 1997 Doug Evans <dje@canuck.cygnus.com>
* sparc-opc.c (sparclet_cpreg_table): Add %ccsr2, %cccrr, %ccrstr.
Tue Sep 16 15:18:20 1997 Nick Clifton <nickc@cygnus.com>
- * v850-opc.c (v850_opcodes): Further rearrangements.
+ * v850-opc.c (v850_opcodes): Further rearrangements.
-start-sanitize-d30v
Tue Sep 16 16:12:11 1997 Ken Raeburn <raeburn@cygnus.com>
* d30v-opc.c (rot2h, sra2h, srl2h insns): Revert last change.
-end-sanitize-d30v
Tue Sep 16 09:48:50 1997 Nick Clifton <nickc@cygnus.com>
* v850-opc.c (v850_opcodes): Fields reordered to allow assembler
Tue Sep 16 10:01:00 1997 Gavin Koch <gavin@cygnus.com>
* mips-opc.c: Added tx39 insns sdbbp, rfe, and deret.
-start-sanitize-tx19
- * mips16-opc.c: Added mips16 sdbbp.
-end-sanitize-tx19
Mon Sep 15 18:31:52 1997 Nick Clifton <nickc@cygnus.com>
* v850-opc.c: Initialise processors field of v850_opcode structure.
-start-sanitize-d30v
Wed Aug 27 21:42:39 1997 Ken Raeburn <raeburn@cygnus.com>
Merge changes from Martin Hunt:
and cmp instructions.
* d30v-opc.c: Correct entries for repeat*, and sat*.
- Make IMM5 unsigned. Create IMM6U and IMM12S3U operand
+ Make IMM5 unsigned. Create IMM6U and IMM12S3U operand
types. Correct several formats.
* d30v-opc.c: (pre_defined_registers): Add dpsw and dpc.
New form: SHORT_A2; a SHORT_A form that needs an even
register as the first operand.
- * d30v-dis.c (print_insn_d30v): Fix problem where the last
+ * d30v-dis.c (print_insn_d30v): Fix problem where the last
instruction was not being disassembled if there were an odd
number of instructions.
* d30v-opc.c (SHORT_M2, LONG_M2): Two new forms.
-end-sanitize-d30v
-start-sanitize-v850e
Fri Sep 12 11:43:54 1997 Nick Clifton <nickc@cygnus.com>
* v850-dis.c (disassemble): Improved display of register lists.
-end-sanitize-v850e
Thu Sep 11 17:35:10 1997 Doug Evans <dje@canuck.cygnus.com>
* sparc-opc.c (sparc_opcodes): Fix assembler args to
* v850-opc.c (v850_opcodes[]): Add NOT_R0 flag to decect cases
where r0 is being used as a destination register.
-start-sanitize-v850e
Thu Aug 21 11:09:09 1997 Nick Clifton <nickc@cygnus.com>
* v850-opc.c (v850_opcodes[]): Move divh opcodes next to each other.
-end-sanitize-v850e
-
-Wed Aug 20 00:43:11 1997 J"orn Rennecke <amylaar@cygnus.co.uk>
-
- * sh-opc.h (sh_arg_type): Add A_SGR and A_DBR.
- (sh_nibble_type, sh_arg_type): Add SH4 floating point extensions.
- (sh_table): Likewise. Add movca.l, ocbi, ocbp, ocbwb.
- Add insns to access SGR and DBR.
- * sh-dis.c (print_insn_shx): Add SH4 floating point extensions.
Tue Aug 19 10:59:59 1997 Richard Henderson <rth@cygnus.com>
* alpha-opc.c (alpha_opcodes): Fix hw_rei_stall mungage.
-start-sanitize-v850e
Mon Aug 18 11:10:03 1997 Nick Clifton <nickc@cygnus.com>
* v850-opc.c (v850_opcodes[]): Remove use of flag field.
* configure (cgen_files): Add support for v850ea target.
* configure.in (cgen_files): Add support for v850ea target.
-end-sanitize-v850e
Fri Aug 15 05:17:48 1997 Doug Evans <dje@canuck.cygnus.com>
Wed Aug 13 18:52:11 1997 Nick Clifton <nickc@cygnus.com>
-start-sanitize-v850e
* v850-dis.c (disassemble): Add support for v850EA instructions.
-
+
* v850-opc.c (insert_i5div, extract_i5div): New Functions.
(v850_opcodes): Add v850EA instructions.
* v850-dis.c (disassemble): Add support for v850E instructions.
-
+
* v850-opc.c (insert_d5_4, extract_d5_4, insert_d16_16,
extract_d16_16, insert_i9, extract_i9, insert_u9, extract_u9,
insert_spe, extract_spe): New Functions.
(v850_opcodes): Add v850E instructions.
-end-sanitize-v850e
-
+
* v850-opc.c: Reorganised and re-layed out to improve readability
and portability.
* mips-opc.c: Fix typo/thinko in "eret" instruction.
-start-sanitize-r5900
-Mon Jul 28 22:07:14 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * mips-opc.c: Fix coding of mtsa.
-
-end-sanitize-r5900
Thu Jul 24 13:03:26 1997 Doug Evans <dje@canuck.cygnus.com>
* sparc-opc.c (sparc_opcodes): Fix spelling on fpaddX, fpsubX insns.
precision FP, mark it as such. Likewise for double precision
FP. Mark ISA1 insns. Consolidate duplicate opcodes where
possible.
-start-sanitize-r5900
- (mips_builtin_opcodes): Remove non-existant r5900 instructions
-end-sanitize-r5900
-start-sanitize-r5900
-Thu Jun 26 16:20:27 1997 Jeffrey A Law (law@cygnus.com)
-
- * mips-opc.c (mips_builtin_opcodes): Add "pinteh", "pexeh" and
- "pexew" as synonyms for "pintoh", "pexoh", "pexow".
-
-end-sanitize-r5900
Wed Jun 25 15:25:57 1997 Felix Lee <flee@cirdan.cygnus.com>
* ppc-opc.c (extract_nsi): make unsigned expression signed before
negating it.
(UNUSED): remove one level of parens, so MSVC doesn't choke on
nesting depth when all the macros are expanded.
-
+
Tue Jun 17 17:02:17 1997 Ian Lance Taylor <ian@cygnus.com>
* sparc-opc.c: The fcmp v9a instructions take an integer register
Tue May 20 11:26:27 1997 Gavin Koch <gavin@cygnus.com>
- * mips-opc.c (mips_builtin_opcodes): Moved INSN_ISA field into new
+ * mips-opc.c (mips_builtin_opcodes): Moved INSN_ISA field into new
field membership.
* mips16-opc.c (mip16_opcodes): same.
* mips-opc.c: Add dctr and dctw.
-start-sanitize-d30v
Sun Mar 23 18:08:10 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
* d30v-dis.c (print_insn): Change the way signed constants
are displayed.
-end-sanitize-d30v
+
Fri Mar 21 14:37:52 1997 Ian Lance Taylor <ian@cygnus.com>
* Makefile.in (BFD_H): New variable.
* m68k-opc.c (m68k_opcode_aliases): Added blo and blo{s,b,w,l}.
-start-sanitize-coldfire
-Wed Mar 19 06:53:58 1997 J.T. Conklin <jtc@rtl.cygnus.com>
-
- * m68k-opc.c (m68k_opcodes): Provide coldfire division module
- instructions.
-
-end-sanitize-coldfire
Tue Mar 18 14:17:03 1997 Jeffrey A Law (law@cygnus.com)
* mn10200-opc.c: Change "trap" to "syscall".
* m68k-opc.c (m68k_opcodes): Provide correct entries for mulsl and
mulul insns on the coldfire.
-
+
Sat Mar 15 17:13:05 1997 Ian Lance Taylor <ian@cygnus.com>
* arm-dis.c (print_insn_arm): Don't print instruction bytes.
* m68k-opc.c (m68k_opcodes): Added entries for the tst insns on
the mc68000.
-
+
Thu Feb 27 14:04:32 1997 Philippe De Muyter <phdm@info.ucl.ac.be>
* m68k-opc.c (m68k_opcodes): Added swbegl pseudo-instruction.
-start-sanitize-tic80
Thu Feb 27 11:36:41 1997 Michael Meissner <meissner@cygnus.com>
* tic80-dis.c (print_insn_tic80): Set info->bytes_per_line to 8.
* tic80-opc.c (tic80_predefined_symbols): Define r25 properly.
-end-sanitize-tic80
Wed Feb 26 13:38:30 1997 Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>
* m68k-dis.c (NEXTSINGLE, NEXTDOUBLE, NEXTEXTEND): Use
Mon Feb 24 15:19:01 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
- * d10v-dis.c, d10v-opc.c: Change pre_defined_registers to
+ * d10v-dis.c, d10v-opc.c: Change pre_defined_registers to
d10v_predefined_registers and reg_name_cnt to d10v_reg_name_cnt.
-start-sanitize-tic80
Mon Feb 24 14:33:26 1997 Fred Fish <fnf@cygnus.com>
* tic80-opc.c (LSI_SCALED): Renamed from this ...
(tic80_opcodes): Replace all occurances of LSI_SCALED with
OFF_SL_BR_SCALED.
-end-sanitize-tic80
Sat Feb 22 21:25:00 1997 Dawn Perchik <dawn@cygnus.com>
* mips-opc.c: Add macros for cop0, cop1 cop2 and cop3.
- Change mips_opcodes from const array to a pointer,
+ Change mips_opcodes from const array to a pointer,
and change bfd_mips_num_opcodes from const int to int,
- so that we can increase the size of the mips opcodes table
+ so that we can increase the size of the mips opcodes table
dynamically.
-start-sanitize-tic80
Sat Feb 22 21:03:47 1997 Fred Fish <fnf@cygnus.com>
* tic80-opc.c (tic80_predefined_symbols): Revert change to
value for a BITNUM operand.
* tic80-dis.c (print_operand_bitnum): Ditto.
-end-sanitize-tic80
-start-sanitize-d30v
Fri Feb 21 16:31:18 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
* d30v-opc.c: Removed references to FLAG_X.
-end-sanitize-d30v
Wed Feb 19 14:51:20 1997 Ian Lance Taylor <ian@cygnus.com>
* Makefile.in: Add dependencies on ../bfd/bfd.h as required.
-start-sanitize-d30v
Tue Feb 18 17:43:43 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
* Makefile.in: Added d30v object files.
* d30v-opc.c: New file.
* disassemble.c (disassembler) Add entry for d30v.
-end-sanitize-d30v
-start-sanitize-tic80
Tue Feb 18 16:32:08 1997 Fred Fish <fnf@cygnus.com>
- * tic80-opc.c (tic80_predefined_symbols): Add symbolic
+ * tic80-opc.c (tic80_predefined_symbols): Add symbolic
representations for the floating point BITNUM values.
Fri Feb 14 12:14:05 1997 Fred Fish <fnf@cygnus.com>
* tic80-dis.c (print_operand_bitnum): Remove code that did
one's complement for BITNUM values.
-end-sanitize-tic80
-start-sanitize-r5900
-Fri Feb 14 13:56:51 1997 Gavin Koch <gavin@cygnus.com>
-
- * mips-opc.c: bug fix, can't mark insns INSN_5900 and INSN_ISA4
-
-end-sanitize-r5900
Thu Feb 13 21:56:51 1997 Klaus Kaempf <kkaempf@progis.de>
* makefile.vms: Remove 8 bit characters. Update to latest
* m68k-dis.c (print_insn_m68k): Set bytes_per_chunk and
bytes_per_line.
-start-sanitize-tic80
Tue Feb 11 16:36:31 1997 Fred Fish <fnf@cygnus.com>
* tic80-opc.c (tic80_operands): Fix typo '+' -> '|'.
come after short immediate forms, making it easier for
assembler to select the right one for a given operand.
-end-sanitize-tic80
Tue Feb 11 15:26:47 1997 Ian Lance Taylor <ian@cygnus.com>
* mips-dis.c (_print_insn_mips): Set bytes_per_chunk and
display_endian.
(print_insn_mips16): Likewise.
-start-sanitize-r5900
-Fri Feb 7 11:12:44 1997 Gavin Koch <gavin@cygnus.com>
-
- * mips-opc.c: add r5900.
-
-end-sanitize-r5900
-start-sanitize-tic80
Mon Feb 10 10:12:41 1997 Fred Fish <fnf@cygnus.com>
* tic80-opc.c (tic80_symbol_to_value): Changed to accept
register operands to use the new operand table entries.
Add "or" entries that are identical to "or.tt" entries.
-end-sanitize-tic80
Wed Feb 5 11:12:44 1997 Ian Lance Taylor <ian@cygnus.com>
* mips16-opc.c: Add new cases of exit instruction for
registers in operands of exit instruction. Print `$' before
register names in operands of entry and exit instructions.
-start-sanitize-tic80
Thu Jan 30 14:09:03 1997 Fred Fish <fnf@cygnus.com>
* tic80-opc.c (tic80_predefined_symbols): Table of name/value
print_operand_condition_code, print_operand_bitnum):
Remove private tables and use tic80_value_to_symbol function.
-end-sanitize-tic80
Thu Jan 30 11:30:45 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
* d10v-dis.c (print_operand): Change address printing
* m68k-opc.c (m68k_opcodes): Changed operand specifier for the
coldfire moveb instruction to not allow an address register as
destination. Although the documentation does not indicate that
- this is invalid, experiments uncovered unexpected behavior.
+ this is invalid, experiments uncovered unexpected behavior.
Added a comment explaining the situation. Thanks to Andreas
Schwab for pointing this out to me.
-start-sanitize-tic80
Wed Jan 22 20:13:51 1997 Fred Fish <fnf@cygnus.com>
* tic80-opc.c (tic80_opcodes): Expand comment to note that the
entries are presorted so that entries with the same mnemonic are
adjacent to each other in the table. Sort the entries for each
instruction so that this is true.
-
-end-sanitize-tic80
+
Mon Jan 20 12:48:57 1997 Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>
* m68k-dis.c: Include <libiberty.h>.
(print_insn_m68k): Sort the opcode table on the most significant
nibble of the opcode.
-start-sanitize-tic80
Sat Jan 18 15:15:05 1997 Fred Fish <fnf@cygnus.com>
* tic80-dis.c (tic80_opcodes): Add "wrcr", "vmpy", "vrnd",
"vsub", "vst", "xnor", and "xor" instructions.
(V_a1): Renamed from V_a, msb of accumulator reg number.
(V_a0): Add macro, lsb of accumulator reg number.
-
+
Fri Jan 17 18:24:31 1997 Fred Fish <fnf@cygnus.com>
* tic80-dis.c (print_insn_tic80): Broke excessively long
math instruction packed into a single opcode.
* tic80-opc.c (tic80_opcodes): Expand comment for vld opcode
to explain why it comes after the other vector opcodes.
-
-end-sanitize-tic80
+
Fri Jan 17 16:19:15 1997 J.T. Conklin <jtc@beauty.cygnus.com>
- * m68k-opc.c (m68k_opcodes): add b, w, or l specifier to coldfire
+ * m68k-opc.c (m68k_opcodes): add b, w, or l specifier to coldfire
move insns to handle immediate operands.
-
+
Thu Jan 17 16:19:00 1997 Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>
* m68k-opc.c (m68k_opcodes): Delete duplicate entry for "cmpil".
fix operand mask in the "moveml" entries for the coldfire.
-start-sanitize-tic80
Thu Jan 16 20:54:40 1997 Fred Fish <fnf@cygnus.com>
* tic80-opc.c (V_a, V_m, V_S, V_Z, V_p, OP_V, MASK_V):
Remove some opcodes that are possible, but illegal, such
as long immediate instructions with doubles for immediate
values. Add "vadd" and "vld" instructions.
-
+
Wed Jan 15 18:59:51 1997 Fred Fish <fnf@cygnus.com>
* tic80-opc.c (tic80_operands): Reorder some table entries to make
followed by a tab. Use renamed TIC80_OPERAND_PCREL flag bit rather
than old TIC80_OPERAND_RELATIVE. Add support for new
TIC80_OPERAND_BASEREL flag bit.
-
+
Mon Jan 13 15:58:56 1997 Fred Fish <fnf@cygnus.com>
* tic80-dis.c (print_insn_tic80): Print floating point operands
(P2): Macro for the 'P2' field.
(P1): Macro for the 'P1' field.
(tic80_opcodes): Add entries for "exts", "extu", "fadd",
- "fcmp", and "fdiv".
-
-end-sanitize-tic80
+ "fcmp", and "fdiv".
+
Mon Jan 6 15:06:55 1997 Jeffrey A Law (law@cygnus.com)
* mn10200-dis.c (disassemble): Mask off unwanted bits after
adding in current address for pc-relative operands.
-start-sanitize-tic80
Mon Jan 6 10:56:25 1997 Fred Fish <fnf@cygnus.com>
* tic80-dis.c (R_SCALED): Add macro to test for ":s" modifier bit.
(print_insn_tic80): If R_SCALED then print ":s" modifier for operand.
* tic80-opc.c (REG0, REG22, REG27, SSOFF, LSOFF): Names
changed to REG_0, REG_22, REG_DEST, OFF_SS, OFF_SL respectively.
- (SICR, LICR, REGM_SI, REGM_LI): Names changed to CR_SI, CR_LI,
+ (SICR, LICR, REGM_SI, REGM_LI): Names changed to CR_SI, CR_LI,
REG_BASE_M_SI, REG_BASE_M_LI respectively.
(REG_SCALED, LSI_SCALED): New operand types.
(E): New macro for 'E' bit at bit 27.
(tic80_opcodes): Add and test dld, dld.u, dst, estop, and etrap
opcodes, including the various size flavors (b,h,w,d) for
the direct load and store instructions.
-
+
Sun Jan 5 12:18:14 1997 Fred Fish <fnf@cygnus.com>
* tic80-dis.c (M_SI, M_LI): Add macros to test for ":m" modifier bit
(MASK_LI_M, MASK_SI_M, MASK_REG_M): Remove and replace in opcode
masks with "MASK_* & ~M_*" to get the M bit reset.
(tic80_opcodes): Add bsr, bsr.a, cmnd, cmp, dcachec, and dcachef.
-
+
Sat Jan 4 19:05:05 1997 Fred Fish <fnf@cygnus.com>
* tic80-dis.c (print_insn_tic80): Print TIC80_OPERAND_RELATIVE
(tic80_opcodes): Add and test "nop", "br", "bbo", "bbz",
"bcnd", and "brcr" opcodes.
-end-sanitize-tic80
Fri Jan 3 18:32:11 1997 Fred Fish <fnf@cygnus.com>
* ppc-opc.c (powerpc_operands): Make comment match the
actual fields (no shift field).
* sparc-opc.c (sparc_opcodes): Document why this cannot be "const".
-start-sanitize-tic80
* tic80-dis.c (print_insn_tic80): Replace abort stub with a
partial implementation, work in progress.
* tic80-opc.c (tic80_operands): Begin construction operands table.
(tic80_opcodes): Continue populating opcodes table and start
filling in the operand indices.
(tic80_num_opcodes): Add this.
-end-sanitize-tic80
Fri Jan 3 12:13:52 1997 Ian Lance Taylor <ian@cygnus.com>
Mon Dec 30 17:02:11 1996 Fred Fish <fnf@cygnus.com>
* Makefile.in (m68k-opc.o, alpha-opc.o): Remove dis-asm.h dependency.
-start-sanitize-tic80
(tic80-dis.o, tic80-opc.o): Add rules per comment in Makefile.in.
-end-sanitize-tic80
-
+
Mon Dec 30 11:38:01 1996 Ian Lance Taylor <ian@cygnus.com>
* mips16-opc.c: Add "abs".
-start-sanitize-tic80
Sun Dec 29 10:58:22 1996 Fred Fish <fnf@cygnus.com>
* Makefile.in (ALL_MACHINES): Add tic80-dis.o and tic80-opc.o.
* configure: Regenerate with autoconf.
* tic80-dis.c: Add file.
* tic80-opc.c: Add file.
-
-end-sanitize-tic80
+
Fri Dec 20 14:30:19 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
* d10v-opc.c (pre_defined_registers): Add cr[0-15], dpc, dpsw, link.
* m68k-opc.c (m68k_opcodes): The coldfire (mcf5200) can only use
register operands for immediate arithmetic, not, neg, negx, and
set according to condition instructions.
-
+
* m68k-opc.c (m68k_opcodes): Consistantly Use "s" as the storage
specifier of the effective-address operand in immediate forms of
arithmetic instructions. The specifier for the immediate operand
* mn10300-opc.c (mn10300_opcodes): Remove redundant "lcc"
opcode.
- * mn10300-dis.c (disassemble): Use '$' instead of '%' for
+ * mn10300-dis.c (disassemble): Use '$' instead of '%' for
register prefix.
* mn10300-dis.c (disassemble): Prefix registers with '%'.
* mn10300-opc.c (mn10300_operands): Add "REGS" for a register
list.
(mn10300_opcodes): Use REGS for register list in "movm" instructions.
-
+
Mon Nov 18 15:20:35 1996 Michael Meissner <meissner@tiktok.cygnus.com>
* d10v-opc.c (d10v_opcodes): Add3 sets the carry.
* mn10300-opc.c (mn10300_operands): Hijack "bits" field
in MN10300_OPERAND_SPLIT operands for how many bits
appear in the basic insn word. Add IMM32_HIGH24,
- IMM32_HIGH24_LOWSHIFT8, IMM8E_SHIFT8.
+ IMM32_HIGH24_LOWSHIFT8, IMM8E_SHIFT8.
(mn10300_opcodes): Use new operands as needed.
* mn10300-opc.c (mn10300_operands): Add IMM32_LOWSHIFT8
standard disassembly.
* alpha-opc.c (alpha_operands): Rearrange flags slot.
- (alpha_opcodes): Add new BWX, CIX, and MAX instructions.
+ (alpha_opcodes): Add new BWX, CIX, and MAX instructions.
Recategorize PALcode instructions.
Wed Oct 30 16:46:58 1996 Jeffrey A Law (law@cygnus.com)
* mn10300-opc.c (mn10300_opcodes): Add "extended" instructions,
"putx", "getx", "mulq", "mulqu", "sat16", "sat24", "bsch".
-
+
Tue Oct 8 11:55:35 1996 Jeffrey A Law (law@cygnus.com)
* mn10300-opc.c (mn10300_operands): Remove "REGS" operand.
Update many operand fields to deal with signed vs unsigned
issues. Fix one or two typos in the "mov" instruction
opcode, mask and/or operand fields.
-
+
Mon Oct 7 11:39:49 1996 Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>
* m68k-opc.c (plusha): Prefer encoding for m68040up, in case
* configure: (bfd_v850v_arch) Add new case.
* configure.in: (bfd_v850_arch) Add new case.
* v850-opc.c: New file.
-
+
Mon Aug 19 15:21:38 1996 Doug Evans <dje@canuck.cygnus.com>
* sparc-dis.c (print_insn_sparc): Handle little endian sparcs.
* sh-opc.h (sh_arg_type): Add F_FR0.
(sh_table, case fmac): Add F_FR0 as first argument.
-
+
Wed Sep 6 15:08:09 1995 Jim Wilson <wilson@chestnut.cygnus.com>
* sh-opc.h (sh_opcode_info): Increase arg array size to 4.
* sh-opc.h: Added bsrf and braf.
-Wed May 10 14:28:16 1995 Richard Earnshaw (rearnsha@armltd.co.uk)
+Wed May 10 14:28:16 1995 Richard Earnshaw (rearnsha@armltd.co.uk)
* arm-opc.h (arm_opcodes): Add 64-bit multiply patterns. Delete
bogus [ls]fm{ea,fd} patterns.
* mpw-config.in (target_arch): Compute from canonical target.
(m68k, mips, powerpc, sparc): Add architectures.
* mpw-make.in (disassemble.c.o): Add.
- (ALL_CFLAGS): Remove special flags (-mc68020 -mc68881 -model far).
+ (ALL_CFLAGS): Remove special flags (-mc68020 -mc68881 -model far).
* mpw-config.in (BFD_MACHINES): Set to a default value.
* mpw-make.in (BFD_MACHINES): Remove wired-in value.
Mon Jan 17 20:05:49 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
* hppa-dis.c (print_insn_hppa): Handle 'N' in assembler template.
- No space before 'u', 'f', or 'N'.
+ No space before 'u', 'f', or 'N'.
Sun Jan 16 14:20:16 1994 Jim Kingdon (kingdon@deneb.cygnus.com)
Sun Nov 7 23:52:34 1993 Peter Schauer (pes@regent.e-technik.tu-muenchen.de)
* alpha-opc.h, alpha-dis.c (print_insn_alpha): Add
- FLOAT_MEMORY_FORMAT_CODE, FLOAT_BRANCH_FORMAT_CODE, correct
+ FLOAT_MEMORY_FORMAT_CODE, FLOAT_BRANCH_FORMAT_CODE, correct
FLOAT_FORMAT_CODE to put out floating point register names.
Mon Nov 1 18:17:51 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
defined, since gdb has been fixed.
Changes from Jeff Law, law@cs.utah.edu:
- * hppa-dis.c (print_insn_hppa): Last argument to fput_reg,
+ * hppa-dis.c (print_insn_hppa): Last argument to fput_reg,
fput_reg_r, fput_creg, fput_const, and fputs_filtered should
be a *disassemble_info, not a *FILE.
* hppa-dis.c: Support 'd', '!', and 'a'.
projects / external / binutils.git / blobdiff