+2017-05-15 Maciej W. Rozycki <macro@imgtec.com>
+
+ * mips-dis.c (print_insn_args) <default>: Remove an MT ASE
+ reference in CP0 move operand decoding.
+
+2017-05-12 Maciej W. Rozycki <macro@imgtec.com>
+
+ * mips16-opc.c (decode_mips16_operand) <'6'>: Switch the operand
+ type to hexadecimal.
+ (mips16_opcodes): Add operandless "break" and "sdbbp" entries.
+
+2017-05-11 Maciej W. Rozycki <macro@imgtec.com>
+
+ * mips-opc.c (mips_builtin_opcodes): Mark "synciobdma", "syncs",
+ "syncw", "syncws", "sync_acquire", "sync_mb", "sync_release",
+ "sync_rmb" and "sync_wmb" as aliases.
+ * micromips-opc.c (micromips_opcodes): Mark "sync_acquire",
+ "sync_mb", "sync_release", "sync_rmb" and "sync_wmb" as aliases.
+
+2017-05-10 Claudiu Zissulescu <claziss@synopsys.com>
+
+ * arc-dis.c (parse_option): Update quarkse_em option..
+ * arc-ext-tbl.h (dsp_fp_flt2i, dsp_fp_i2flt): Change subclass to
+ QUARKSE1.
+ (dsp_fp_div, dsp_fp_cmp): Change subclass to QUARKSE2.
+
+2017-05-03 Kito Cheng <kito.cheng@gmail.com>
+
+ * riscv-dis.c (print_insn_args): Handle 'Co' operands.
+
+2017-05-01 Michael Clark <michaeljclark@mac.com>
+
+ * riscv-opc.c (riscv_opcodes) <call>: Use RA not T1 as a temporary
+ register.
+
+2017-05-02 Maciej W. Rozycki <macro@imgtec.com>
+
+ * mips-dis.c (print_insn_arg): Only clear the ISA bit for jumps
+ and branches and not synthetic data instructions.
+
+2017-05-02 Bernd Edlinger <bernd.edlinger@hotmail.de>
+
+ * arm-dis.c (print_insn_thumb32): Fix value_in_comment.
+
+2017-04-25 Claudiu Zissulescu <claziss@synopsys.com>
+
+ * arc-dis.c (print_insn_arc): Smartly print enter/leave mnemonics.
+ * arc-opc.c (insert_r13el): New function.
+ (R13_EL): Define.
+ * arc-tbl.h: Add new enter/leave variants.
+
+2017-04-25 Claudiu Zissulescu <claziss@synopsys.com>
+
+ * arc-tbl.h: Reorder NOP entry to be before MOV instructions.
+
+2017-04-25 Maciej W. Rozycki <macro@imgtec.com>
+
+ * mips-dis.c (print_mips_disassembler_options): Add
+ `no-aliases'.
+
+2017-04-25 Maciej W. Rozycki <macro@imgtec.com>
+
+ * mips16-opc.c (AL): New macro.
+ (mips16_opcodes): Mark "nop", "la", "dla", and synthetic forms
+ of "ld" and "lw" as aliases.
+
+2017-04-24 Tamar Christina <tamar.christina@arm.com>
+
+ * aarch64-opc.c (aarch64_logical_immediate_p): Update DEBUG_TRACE
+ arguments.
+
+2017-04-22 Alexander Fedotov <alfedotov@gmail.com>
+ Alan Modra <amodra@gmail.com>
+
+ * ppc-opc.c (ELEV): Define.
+ (vle_opcodes): Add se_rfgi and e_sc.
+ (powerpc_opcodes): Enable lbdx, lhdx, lwdx, stbdx, sthdx, stwdx
+ for E200Z4.
+
+2017-04-21 Jose E. Marchesi <jose.marchesi@oracle.com>
+
+ * sparc-opc.c (sparc_opcodes): Mark RETT instructions as v6notv9.
+
+2017-04-21 Nick Clifton <nickc@redhat.com>
+
+ PR binutils/21380
+ * aarch64-tbl.h (aarch64_opcode_table): Fix masks for LD1R, LD2R,
+ LD3R and LD4R.
+
2017-04-13 Alan Modra <amodra@gmail.com>
* epiphany-desc.c: Regenerate.