-/* mga_drm_public.h -- Public header for the Matrox g200/g400 driver -*- linux-c -*-
+/* mga_drm.h -- Public header for the Matrox g200/g400 driver -*- linux-c -*-
* Created: Tue Jan 25 01:50:01 1999 by jhartmann@precisioninsight.com
*
* Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
* Authors: Jeff Hartmann <jhartmann@precisioninsight.com>
* Keith Whitwell <keithw@precisioninsight.com>
*
- * $XFree86: xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/mga_drm_public.h,v 1.1 2000/02/11 17:26:07 dawes Exp $
+ * $XFree86$
*/
-#ifndef _MGA_DRM_PUBLIC_H_
-#define _MGA_DRM_PUBLIC_H_
+#ifndef _MGA_DRM_H_
+#define _MGA_DRM_H_
+/* WARNING: If you change any of these defines, make sure to change the
+ * defines in the Xserver file (xf86drmMga.h)
+ */
+#ifndef _MGA_DEFINES_
+#define _MGA_DEFINES_
#define MGA_F 0x1 /* fog */
#define MGA_A 0x2 /* alpha */
#define MGA_S 0x4 /* specular */
#define MGA_WARP_T2GZSA (MGA_T2|MGA_S|MGA_A)
#define MGA_WARP_T2GZSAF (MGA_T2|MGA_S|MGA_F|MGA_A)
-
#define MGA_MAX_G400_PIPES 16
#define MGA_MAX_G200_PIPES 8 /* no multitex */
-
#define MGA_MAX_WARP_PIPES MGA_MAX_G400_PIPES
#define MGA_CARD_TYPE_G200 1
#define MGA_CARD_TYPE_G400 2
+#define MGA_FRONT 0x1
+#define MGA_BACK 0x2
+#define MGA_DEPTH 0x4
-
-typedef struct _drm_mga_warp_index {
- int installed;
- unsigned long phys_addr;
- int size;
-} mgaWarpIndex;
-
-typedef struct drm_mga_init {
- enum {
- MGA_INIT_DMA = 0x01,
- MGA_CLEANUP_DMA = 0x02
- } func;
- int reserved_map_agpstart;
- int reserved_map_idx;
- int buffer_map_idx;
- int sarea_priv_offset;
- int primary_size;
- int warp_ucode_size;
- int fbOffset;
- int backOffset;
- int depthOffset;
- int textureOffset;
- int textureSize;
- int cpp;
- int stride;
- int sgram;
- int chipset;
- mgaWarpIndex WarpIndex[MGA_MAX_WARP_PIPES];
-
- /* Redundant?
- */
- int frontOrg;
- int backOrg;
- int depthOrg;
- int mAccess;
-} drm_mga_init_t;
-
-typedef struct _xf86drmClipRectRec {
- unsigned short x1;
- unsigned short y1;
- unsigned short x2;
- unsigned short y2;
-} xf86drmClipRectRec;
-
-#define MGA_CLEAR_FRONT 0x1
-#define MGA_CLEAR_BACK 0x2
-#define MGA_CLEAR_DEPTH 0x4
-
-
-/* Each context has a state:
+/* 3d state excluding texture units:
*/
#define MGA_CTXREG_DSTORG 0 /* validated */
#define MGA_CTXREG_MACCESS 1
#define MGA_CTXREG_WFLAG 6
#define MGA_CTXREG_TDUAL0 7
#define MGA_CTXREG_TDUAL1 8
-#define MGA_CTX_SETUP_SIZE 9
+#define MGA_CTXREG_FCOL 9
+#define MGA_CTX_SETUP_SIZE 10
/* 2d state
*/
#define MGA_TEXREG_HEIGHT 10
#define MGA_TEX_SETUP_SIZE 11
-
/* What needs to be changed for the current vertex dma buffer?
*/
-#define MGASAREA_NEW_CONTEXT 0x1
-#define MGASAREA_NEW_TEX0 0x2
-#define MGASAREA_NEW_TEX1 0x4
-#define MGASAREA_NEW_PIPE 0x8
-#define MGASAREA_NEW_2D 0x10
-
+#define MGA_UPLOAD_CTX 0x1
+#define MGA_UPLOAD_TEX0 0x2
+#define MGA_UPLOAD_TEX1 0x4
+#define MGA_UPLOAD_PIPE 0x8
+#define MGA_UPLOAD_TEX0IMAGE 0x10
+#define MGA_UPLOAD_TEX1IMAGE 0x20
+#define MGA_UPLOAD_2D 0x40
+#define MGA_WAIT_AGE 0x80 /* handled client-side */
+#define MGA_UPLOAD_CLIPRECTS 0x100 /* handled client-side */
+#define MGA_DMA_FLUSH 0x200 /* set when someone gets the lock
+ quiescent */
+
+/* 64 buffers of 16k each, total 1 meg.
+ */
+#define MGA_DMA_BUF_ORDER 14
+#define MGA_DMA_BUF_SZ (1<<MGA_DMA_BUF_ORDER)
+#define MGA_DMA_BUF_NR 63
-/* Keep this small for testing
+/* Keep these small for testing.
*/
-#define MGA_NR_SAREA_CLIPRECTS 2
+#define MGA_NR_SAREA_CLIPRECTS 8
-/* Upto 128 regions. Minimum region size of 256k.
+/* 2 heaps (1 for card, 1 for agp), each divided into upto 128
+ * regions, subject to a minimum region size of (1<<16) == 64k.
+ *
+ * Clients may subdivide regions internally, but when sharing between
+ * clients, the region size is the minimum granularity.
*/
-#define MGA_NR_TEX_REGIONS 128
-#define MGA_MIN_LOG_TEX_GRANULARITY 18
-typedef struct {
- unsigned char next, prev;
- unsigned char in_use;
- int age;
-} mgaTexRegion;
+#define MGA_CARD_HEAP 0
+#define MGA_AGP_HEAP 1
+#define MGA_NR_TEX_HEAPS 2
+#define MGA_NR_TEX_REGIONS 16
+#define MGA_LOG_MIN_TEX_REGION_SIZE 16
+#endif
+
+typedef struct _drm_mga_warp_index {
+ int installed;
+ unsigned long phys_addr;
+ int size;
+} drm_mga_warp_index_t;
+
+typedef struct drm_mga_init {
+ enum {
+ MGA_INIT_DMA = 0x01,
+ MGA_CLEANUP_DMA = 0x02
+ } func;
+ int reserved_map_agpstart;
+ int reserved_map_idx;
+ int buffer_map_idx;
+ int sarea_priv_offset;
+ int primary_size;
+ int warp_ucode_size;
+ int frontOffset;
+ int backOffset;
+ int depthOffset;
+ int textureOffset;
+ int textureSize;
+ int agpTextureOffset;
+ int agpTextureSize;
+ int cpp;
+ int stride;
+ int sgram;
+ int chipset;
+ drm_mga_warp_index_t WarpIndex[MGA_MAX_WARP_PIPES];
+ int mAccess;
+} drm_mga_init_t;
+
+/* Warning: if you change the sarea structure, you must change the Xserver
+ * structures as well */
+
+typedef struct _drm_mga_tex_region {
+ unsigned char next, prev;
+ unsigned char in_use;
+ int age;
+} drm_mga_tex_region_t;
-typedef struct
-{
+typedef struct _drm_mga_sarea {
+ /* The channel for communication of state information to the kernel
+ * on firing a vertex dma buffer.
+ */
unsigned int ContextState[MGA_CTX_SETUP_SIZE];
unsigned int ServerState[MGA_2D_SETUP_SIZE];
unsigned int TexState[2][MGA_TEX_SETUP_SIZE];
unsigned int dirty;
unsigned int nbox;
- xf86drmClipRectRec boxes[MGA_NR_SAREA_CLIPRECTS];
+ drm_clip_rect_t boxes[MGA_NR_SAREA_CLIPRECTS];
- /* kernel doesn't touch from here down */
- int ctxOwner;
- mgaTexRegion texList[MGA_NR_TEX_REGIONS+1];
- int texAge;
-} drm_mga_sarea_t;
+
+ /* Information about the most recently used 3d drawable. The
+ * client fills in the req_* fields, the server fills in the
+ * exported_ fields and puts the cliprects into boxes, above.
+ *
+ * The client clears the exported_drawable field before
+ * clobbering the boxes data.
+ */
+ unsigned int req_drawable; /* the X drawable id */
+ unsigned int req_draw_buffer; /* MGA_FRONT or MGA_BACK */
+
+ unsigned int exported_drawable;
+ unsigned int exported_index;
+ unsigned int exported_stamp;
+ unsigned int exported_buffers;
+ unsigned int exported_nfront;
+ unsigned int exported_nback;
+ int exported_back_x, exported_front_x, exported_w;
+ int exported_back_y, exported_front_y, exported_h;
+ drm_clip_rect_t exported_boxes[MGA_NR_SAREA_CLIPRECTS];
+
+ /* Counters for aging textures and for client-side throttling.
+ */
+ int last_enqueue; /* last time a buffer was enqueued */
+ int last_dispatch; /* age of the most recently dispatched buffer */
+ int last_quiescent; /* */
+ /* LRU lists for texture memory in agp space and on the card
+ */
+ drm_mga_tex_region_t texList[MGA_NR_TEX_HEAPS][MGA_NR_TEX_REGIONS+1];
+ unsigned int texAge[MGA_NR_TEX_HEAPS];
+
+ /* Mechanism to validate card state.
+ */
+ int ctxOwner;
+} drm_mga_sarea_t;
+
/* Device specific ioctls:
*/
-typedef struct {
+typedef struct _drm_mga_clear {
int clear_color;
int clear_depth;
int flags;
} drm_mga_clear_t;
-
-typedef struct {
- int flags; /* not actually used? */
+typedef struct _drm_mga_swap {
+ int dummy;
} drm_mga_swap_t;
-typedef struct {
+typedef struct _drm_mga_iload {
+ int idx;
+ int length;
unsigned int destOrg;
- unsigned int mAccess;
- unsigned int pitch;
- xf86drmClipRectRec texture;
- int idx;
} drm_mga_iload_t;
+typedef struct _drm_mga_vertex {
+ int idx; /* buffer to queue */
+ int used; /* bytes in use */
+ int discard; /* client finished with buffer? */
+} drm_mga_vertex_t;
-#define DRM_IOCTL_MGA_INIT DRM_IOW( 0x40, drm_mga_init_t)
-#define DRM_IOCTL_MGA_SWAP DRM_IOW( 0x41, drm_mga_swap_t)
-#define DRM_IOCTL_MGA_CLEAR DRM_IOW( 0x42, drm_mga_clear_t)
-#define DRM_IOCTL_MGA_ILOAD DRM_IOW( 0x43, drm_mga_iload_t)
#endif
projects / platform / upstream / libdrm.git / blobdiff