Revert "Enable relro by default for AArch64, ARM and SCORE."
[external/binutils.git] / ld / emultempl / armelf.em
index ea00b87..6074824 100644 (file)
@@ -1,7 +1,5 @@
 # This shell script emits a C file. -*- C -*-
-#   Copyright 1991, 1993, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003,
-#   2004, 2005, 2006, 2007, 2008, 2009
-#   Free Software Foundation, Inc.
+#   Copyright (C) 1991-2016 Free Software Foundation, Inc.
 #
 # This file is part of the GNU Binutils.
 #
@@ -30,17 +28,20 @@ fragment <<EOF
 #include "ldctor.h"
 #include "elf/arm.h"
 
-static char *thumb_entry_symbol = NULL;
+static char * thumb_entry_symbol = NULL;
 static int byteswap_code = 0;
 static int target1_is_rel = 0${TARGET1_IS_REL};
-static char *target2_type = "${TARGET2_TYPE}";
+static char * target2_type = "${TARGET2_TYPE}";
 static int fix_v4bx = 0;
 static int use_blx = 0;
 static bfd_arm_vfp11_fix vfp11_denorm_fix = BFD_ARM_VFP11_FIX_DEFAULT;
+static bfd_arm_stm32l4xx_fix stm32l4xx_fix = BFD_ARM_STM32L4XX_FIX_NONE;
 static int fix_cortex_a8 = -1;
 static int no_enum_size_warning = 0;
 static int no_wchar_size_warning = 0;
 static int pic_veneer = 0;
+static int merge_exidx_entries = -1;
+static int fix_arm1176 = 1;
 
 static void
 gld${EMULATION_NAME}_before_parse (void)
@@ -48,8 +49,22 @@ gld${EMULATION_NAME}_before_parse (void)
 #ifndef TARGET_                        /* I.e., if not generic.  */
   ldfile_set_output_arch ("`echo ${ARCH}`", bfd_arch_unknown);
 #endif /* not TARGET_ */
-  config.dynamic_link = ${DYNAMIC_LINK-TRUE};
+  input_flags.dynamic = ${DYNAMIC_LINK-TRUE};
   config.has_shared = `if test -n "$GENERATE_SHLIB_SCRIPT" ; then echo TRUE ; else echo FALSE ; fi`;
+  config.separate_code = `if test "x${SEPARATE_CODE}" = xyes ; then echo TRUE ; else echo FALSE ; fi`;
+}
+
+static void
+gld${EMULATION_NAME}_set_symbols (void)
+{
+  /* PR 19106: The section resizing code in gldarmelf_after_allocation
+     is effectively the same as relaxation, so prevent early memory
+     region checks which produce bogus error messages.
+     Note - this test has nothing to do with symbols.  It is just here
+     because this is the first emulation routine that is called after
+     the command line has been parsed.  */
+  if (!bfd_link_relocatable (&link_info))
+    TARGET_ENABLE_RELAXATION;
 }
 
 static void
@@ -61,12 +76,20 @@ arm_elf_before_allocation (void)
      due to architecture version.  */
   bfd_elf32_arm_set_vfp11_fix (link_info.output_bfd, &link_info);
 
+  /* Choose type of STM32L4XX erratum fix, or warn if specified fix is
+     unnecessary due to architecture version.  */
+  bfd_elf32_arm_set_stm32l4xx_fix (link_info.output_bfd, &link_info);
+
   /* Auto-select Cortex-A8 erratum fix if it wasn't explicitly specified.  */
   bfd_elf32_arm_set_cortex_a8_fix (link_info.output_bfd, &link_info);
 
+  /* Ensure the output sections of veneers needing a dedicated one is not
+     removed.  */
+  bfd_elf32_arm_keep_private_stub_output_sections (&link_info);
+
   /* We should be able to set the size of the interworking stub section.  We
      can't do it until later if we have dynamic sections, though.  */
-  if (! elf_hash_table (&link_info)->dynamic_sections_created)
+  if (elf_hash_table (&link_info)->dynobj == NULL)
     {
       /* Here we rummage through the found bfds to collect glue information.  */
       LANG_FOR_EACH_INPUT_STATEMENT (is)
@@ -76,7 +99,9 @@ arm_elf_before_allocation (void)
 
          if (!bfd_elf32_arm_process_before_allocation (is->the_bfd,
                                                        &link_info)
-             || !bfd_elf32_arm_vfp11_erratum_scan (is->the_bfd, &link_info))
+             || !bfd_elf32_arm_vfp11_erratum_scan (is->the_bfd, &link_info)
+             || !bfd_elf32_arm_stm32l4xx_erratum_scan (is->the_bfd,
+                                                       &link_info))
            /* xgettext:c-format */
            einfo (_("Errors encountered processing file %s"), is->filename);
        }
@@ -181,13 +206,13 @@ hook_in_stub (struct hook_stub_info *info, lang_statement_union_type **lp)
    immediately after INPUT_SECTION.  */
 
 static asection *
-elf32_arm_add_stub_section (const char *stub_sec_name,
-                           asection *input_section)
+elf32_arm_add_stub_section (const char * stub_sec_name,
+                           asection *   output_section,
+                           asection *   after_input_section,
+                           unsigned int alignment_power)
 {
   asection *stub_sec;
   flagword flags;
-  asection *output_section;
-  const char *secname;
   lang_output_section_statement_type *os;
   struct hook_stub_info info;
 
@@ -198,21 +223,36 @@ elf32_arm_add_stub_section (const char *stub_sec_name,
   if (stub_sec == NULL)
     goto err_ret;
 
-  bfd_set_section_alignment (stub_file->the_bfd, stub_sec, 3);
+  bfd_set_section_alignment (stub_file->the_bfd, stub_sec, alignment_power);
 
-  output_section = input_section->output_section;
-  secname = bfd_get_section_name (output_section->owner, output_section);
-  os = lang_output_section_find (secname);
+  os = lang_output_section_get (output_section);
 
-  info.input_section = input_section;
+  info.input_section = after_input_section;
   lang_list_init (&info.add);
-  lang_add_section (&info.add, stub_sec, os);
+  lang_add_section (&info.add, stub_sec, NULL, os);
 
   if (info.add.head == NULL)
     goto err_ret;
 
-  if (hook_in_stub (&info, &os->children.head))
-    return stub_sec;
+  if (after_input_section == NULL)
+    {
+      lang_statement_union_type **lp = &os->children.head;
+      lang_statement_union_type *l, *lprev = NULL;
+
+      for (; (l = *lp) != NULL; lp = &l->header.next, lprev = l);
+
+      if (lprev)
+       lprev->header.next = info.add.head;
+      else
+       os->children.head = info.add.head;
+
+      return stub_sec;
+    }
+  else
+    {
+      if (hook_in_stub (&info, &os->children.head))
+       return stub_sec;
+    }
 
  err_ret:
   einfo ("%X%P: can not make stub section: %E\n");
@@ -238,7 +278,7 @@ build_section_lists (lang_statement_union_type *statement)
     {
       asection *i = statement->input_section.section;
 
-      if (!((lang_input_statement_type *) i->owner->usrdata)->just_syms_flag
+      if (i->sec_info_type != SEC_INFO_TYPE_JUST_SYMS
          && (i->flags & SEC_EXCLUDE) == 0
          && i->output_section != NULL
          && i->output_section->owner == link_info.output_bfd)
@@ -252,87 +292,92 @@ compare_output_sec_vma (const void *a, const void *b)
   asection *asec = *(asection **) a, *bsec = *(asection **) b;
   asection *aout = asec->output_section, *bout = bsec->output_section;
   bfd_vma avma, bvma;
-  
+
   /* If there's no output section for some reason, compare equal.  */
   if (!aout || !bout)
     return 0;
-  
+
   avma = aout->vma + asec->output_offset;
   bvma = bout->vma + bsec->output_offset;
-  
+
   if (avma > bvma)
     return 1;
   else if (avma < bvma)
     return -1;
-  
+
   return 0;
 }
 
 static void
 gld${EMULATION_NAME}_after_allocation (void)
 {
-  if (!link_info.relocatable)
+  int ret;
+
+  /* Build a sorted list of input text sections, then use that to process
+     the unwind table index.  */
+  unsigned int list_size = 10;
+  asection **sec_list = (asection **)
+      xmalloc (list_size * sizeof (asection *));
+  unsigned int sec_count = 0;
+
+  LANG_FOR_EACH_INPUT_STATEMENT (is)
     {
-      /* Build a sorted list of input text sections, then use that to process
-        the unwind table index.  */
-      unsigned int list_size = 10;
-      asection **sec_list = (asection **)
-          xmalloc (list_size * sizeof (asection *));
-      unsigned int sec_count = 0;
+      bfd *abfd = is->the_bfd;
+      asection *sec;
 
-      LANG_FOR_EACH_INPUT_STATEMENT (is)
+      if ((abfd->flags & (EXEC_P | DYNAMIC)) != 0)
+       continue;
+
+      for (sec = abfd->sections; sec != NULL; sec = sec->next)
        {
-         bfd *abfd = is->the_bfd;
-         asection *sec;
-         
-         if ((abfd->flags & (EXEC_P | DYNAMIC)) != 0)
-           continue;
-         
-         for (sec = abfd->sections; sec != NULL; sec = sec->next)
+         asection *out_sec = sec->output_section;
+
+         if (out_sec
+             && elf_section_data (sec)
+             && elf_section_type (sec) == SHT_PROGBITS
+             && (elf_section_flags (sec) & SHF_EXECINSTR) != 0
+             && (sec->flags & SEC_EXCLUDE) == 0
+             && sec->sec_info_type != SEC_INFO_TYPE_JUST_SYMS
+             && out_sec != bfd_abs_section_ptr)
            {
-             asection *out_sec = sec->output_section;
-
-             if (out_sec
-                 && elf_section_data (sec)
-                 && elf_section_type (sec) == SHT_PROGBITS
-                 && (elf_section_flags (sec) & SHF_EXECINSTR) != 0
-                 && (sec->flags & SEC_EXCLUDE) == 0
-                 && sec->sec_info_type != ELF_INFO_TYPE_JUST_SYMS
-                 && out_sec != bfd_abs_section_ptr)
+             if (sec_count == list_size)
                {
-                 if (sec_count == list_size)
-                   {
-                     list_size *= 2;
-                     sec_list = (asection **) 
-                          xrealloc (sec_list, list_size * sizeof (asection *));
-                   }
-
-                 sec_list[sec_count++] = sec;
+                 list_size *= 2;
+                 sec_list = (asection **)
+                     xrealloc (sec_list, list_size * sizeof (asection *));
                }
+
+             sec_list[sec_count++] = sec;
            }
        }
-       
-      qsort (sec_list, sec_count, sizeof (asection *), &compare_output_sec_vma);
-      
-      if (elf32_arm_fix_exidx_coverage (sec_list, sec_count, &link_info))
-       need_laying_out = 1;
-      
-      free (sec_list);
     }
 
+  qsort (sec_list, sec_count, sizeof (asection *), &compare_output_sec_vma);
+
+  if (elf32_arm_fix_exidx_coverage (sec_list, sec_count, &link_info,
+                                   merge_exidx_entries))
+    need_laying_out = 1;
+
+  free (sec_list);
+
   /* bfd_elf32_discard_info just plays with debugging sections,
      ie. doesn't affect any code, so we can delay resizing the
      sections.  It's likely we'll resize everything in the process of
      adding stubs.  */
-  if (bfd_elf_discard_info (link_info.output_bfd, & link_info))
+  ret = bfd_elf_discard_info (link_info.output_bfd, & link_info);
+  if (ret < 0)
+    {
+      einfo ("%X%P: .eh_frame/.stab edit: %E\n");
+      return;
+    }
+  else if (ret > 0)
     need_laying_out = 1;
 
   /* If generating a relocatable output file, then we don't
      have to examine the relocs.  */
-  if (stub_file != NULL && !link_info.relocatable)
+  if (stub_file != NULL && !bfd_link_relocatable (&link_info))
     {
-      int  ret = elf32_arm_setup_section_lists (link_info.output_bfd, & link_info);
-
+      ret = elf32_arm_setup_section_lists (link_info.output_bfd, &link_info);
       if (ret != 0)
        {
          if (ret < 0)
@@ -372,10 +417,14 @@ gld${EMULATION_NAME}_finish (void)
         /* Figure out where VFP11 erratum veneers (and the labels returning
            from same) have been placed.  */
         bfd_elf32_arm_vfp11_fix_veneer_locations (is->the_bfd, &link_info);
+
+        /* Figure out where STM32L4XX erratum veneers (and the labels returning
+          from them) have been placed.  */
+       bfd_elf32_arm_stm32l4xx_fix_veneer_locations (is->the_bfd, &link_info);
       }
   }
 
-  if (! link_info.relocatable)
+  if (!bfd_link_relocatable (&link_info))
     {
       /* Now build the linker stubs.  */
       if (stub_file->the_bfd->sections != NULL)
@@ -402,7 +451,8 @@ gld${EMULATION_NAME}_finish (void)
       h = bfd_link_hash_lookup (link_info.hash, entry_symbol.name,
                                FALSE, FALSE, TRUE);
       eh = (struct elf_link_hash_entry *)h;
-      if (!h || ELF_ST_TYPE(eh->type) != STT_ARM_TFUNC)
+      if (!h || ARM_GET_SYM_BRANCH_TYPE (eh->target_internal)
+               != ST_BRANCH_TO_THUMB)
        return;
     }
 
@@ -460,9 +510,11 @@ arm_elf_create_output_section_statements (void)
   bfd_elf32_arm_set_target_relocs (link_info.output_bfd, &link_info,
                                   target1_is_rel,
                                   target2_type, fix_v4bx, use_blx,
-                                  vfp11_denorm_fix, no_enum_size_warning,
+                                  vfp11_denorm_fix, stm32l4xx_fix,
+                                  no_enum_size_warning,
                                   no_wchar_size_warning,
-                                  pic_veneer, fix_cortex_a8);
+                                  pic_veneer, fix_cortex_a8,
+                                  fix_arm1176);
 
   stub_file = lang_add_input_file ("linker stubs",
                                   lang_input_file_is_fake_enum,
@@ -476,7 +528,7 @@ arm_elf_create_output_section_statements (void)
       einfo ("%X%P: can not create BFD %E\n");
       return;
     }
+
   stub_file->the_bfd->flags |= BFD_LINKER_CREATED;
   ldlang_add_file (stub_file);
 
@@ -522,10 +574,15 @@ PARSE_AND_LIST_PROLOGUE='
 #define OPTION_NO_ENUM_SIZE_WARNING    309
 #define OPTION_PIC_VENEER              310
 #define OPTION_FIX_V4BX_INTERWORKING   311
-#define OPTION_STUBGROUP_SIZE           312
+#define OPTION_STUBGROUP_SIZE          312
 #define OPTION_NO_WCHAR_SIZE_WARNING   313
 #define OPTION_FIX_CORTEX_A8           314
 #define OPTION_NO_FIX_CORTEX_A8                315
+#define OPTION_NO_MERGE_EXIDX_ENTRIES  316
+#define OPTION_FIX_ARM1176             317
+#define OPTION_NO_FIX_ARM1176          318
+#define OPTION_LONG_PLT                        319
+#define OPTION_STM32L4XX_FIX           320
 '
 
 PARSE_AND_LIST_SHORTOPTS=p
@@ -541,39 +598,49 @@ PARSE_AND_LIST_LONGOPTS='
   { "fix-v4bx-interworking", no_argument, NULL, OPTION_FIX_V4BX_INTERWORKING},
   { "use-blx", no_argument, NULL, OPTION_USE_BLX},
   { "vfp11-denorm-fix", required_argument, NULL, OPTION_VFP11_DENORM_FIX},
+  { "fix-stm32l4xx-629360", optional_argument, NULL, OPTION_STM32L4XX_FIX},
   { "no-enum-size-warning", no_argument, NULL, OPTION_NO_ENUM_SIZE_WARNING},
   { "pic-veneer", no_argument, NULL, OPTION_PIC_VENEER},
   { "stub-group-size", required_argument, NULL, OPTION_STUBGROUP_SIZE },
   { "no-wchar-size-warning", no_argument, NULL, OPTION_NO_WCHAR_SIZE_WARNING},
   { "fix-cortex-a8", no_argument, NULL, OPTION_FIX_CORTEX_A8 },
   { "no-fix-cortex-a8", no_argument, NULL, OPTION_NO_FIX_CORTEX_A8 },
+  { "no-merge-exidx-entries", no_argument, NULL, OPTION_NO_MERGE_EXIDX_ENTRIES },
+  { "fix-arm1176", no_argument, NULL, OPTION_FIX_ARM1176 },
+  { "no-fix-arm1176", no_argument, NULL, OPTION_NO_FIX_ARM1176 },
+  { "long-plt", no_argument, NULL, OPTION_LONG_PLT },
 '
 
 PARSE_AND_LIST_OPTIONS='
   fprintf (file, _("  --thumb-entry=<sym>         Set the entry point to be Thumb symbol <sym>\n"));
   fprintf (file, _("  --be8                       Output BE8 format image\n"));
-  fprintf (file, _("  --target1=rel               Interpret R_ARM_TARGET1 as R_ARM_REL32\n"));
-  fprintf (file, _("  --target1=abs               Interpret R_ARM_TARGET1 as R_ARM_ABS32\n"));
+  fprintf (file, _("  --target1-rel               Interpret R_ARM_TARGET1 as R_ARM_REL32\n"));
+  fprintf (file, _("  --target1-abs               Interpret R_ARM_TARGET1 as R_ARM_ABS32\n"));
   fprintf (file, _("  --target2=<type>            Specify definition of R_ARM_TARGET2\n"));
   fprintf (file, _("  --fix-v4bx                  Rewrite BX rn as MOV pc, rn for ARMv4\n"));
   fprintf (file, _("  --fix-v4bx-interworking     Rewrite BX rn branch to ARMv4 interworking veneer\n"));
   fprintf (file, _("  --use-blx                   Enable use of BLX instructions\n"));
   fprintf (file, _("  --vfp11-denorm-fix          Specify how to fix VFP11 denorm erratum\n"));
+  fprintf (file, _("  --fix-stm32l4xx-629360      Specify how to fix STM32L4XX 629360 erratum\n"));
   fprintf (file, _("  --no-enum-size-warning      Don'\''t warn about objects with incompatible\n"
                   "                                enum sizes\n"));
-  fprintf (file, _("  --no-wchar-size-warning     Don'\''t warn about objects with incompatible"
+  fprintf (file, _("  --no-wchar-size-warning     Don'\''t warn about objects with incompatible\n"
                   "                                wchar_t sizes\n"));
   fprintf (file, _("  --pic-veneer                Always generate PIC interworking veneers\n"));
+  fprintf (file, _("  --long-plt                  Generate long .plt entries\n"
+           "                              to handle large .plt/.got displacements\n"));
   fprintf (file, _("\
-   --stub-group-size=N   Maximum size of a group of input sections that can be\n\
-                           handled by one stub section.  A negative value\n\
-                           locates all stubs after their branches (with a\n\
-                           group size of -N), while a positive value allows\n\
-                           two groups of input sections, one before, and one\n\
-                           after each stub section.  Values of +/-1 indicate\n\
-                           the linker should choose suitable defaults.\n"
-                  ));
+  --stub-group-size=N         Maximum size of a group of input sections that\n\
+                               can be handled by one stub section.  A negative\n\
+                               value locates all stubs after their branches\n\
+                               (with a group size of -N), while a positive\n\
+                               value allows two groups of input sections, one\n\
+                               before, and one after each stub section.\n\
+                               Values of +/-1 indicate the linker should\n\
+                               choose suitable defaults.\n"));
   fprintf (file, _("  --[no-]fix-cortex-a8        Disable/enable Cortex-A8 Thumb-2 branch erratum fix\n"));
+  fprintf (file, _("  --no-merge-exidx-entries    Disable merging exidx entries\n"));
+  fprintf (file, _("  --[no-]fix-arm1176          Disable/enable ARM1176 BLX immediate erratum fix\n"));
 '
 
 PARSE_AND_LIST_ARGS_CASES='
@@ -624,6 +691,19 @@ PARSE_AND_LIST_ARGS_CASES='
         einfo (_("Unrecognized VFP11 fix type '\''%s'\''.\n"), optarg);
       break;
 
+    case OPTION_STM32L4XX_FIX:
+      if (!optarg)
+        stm32l4xx_fix = BFD_ARM_STM32L4XX_FIX_DEFAULT;
+      else if (strcmp (optarg, "none") == 0)
+        stm32l4xx_fix = BFD_ARM_STM32L4XX_FIX_NONE;
+      else if (strcmp (optarg, "default") == 0)
+        stm32l4xx_fix = BFD_ARM_STM32L4XX_FIX_DEFAULT;
+      else if (strcmp (optarg, "all") == 0)
+        stm32l4xx_fix = BFD_ARM_STM32L4XX_FIX_ALL;
+      else
+        einfo (_("Unrecognized STM32L4XX fix type '\''%s'\''.\n"), optarg);
+      break;
+
     case OPTION_NO_ENUM_SIZE_WARNING:
       no_enum_size_warning = 1;
       break;
@@ -653,6 +733,22 @@ PARSE_AND_LIST_ARGS_CASES='
     case OPTION_NO_FIX_CORTEX_A8:
       fix_cortex_a8 = 0;
       break;
+
+   case OPTION_NO_MERGE_EXIDX_ENTRIES:
+      merge_exidx_entries = 0;
+      break;
+
+   case OPTION_FIX_ARM1176:
+      fix_arm1176 = 1;
+      break;
+
+   case OPTION_NO_FIX_ARM1176:
+      fix_arm1176 = 0;
+      break;
+
+   case OPTION_LONG_PLT:
+      bfd_elf32_arm_use_long_plt ();
+      break;
 '
 
 # We have our own before_allocation etc. functions, but they call
@@ -663,6 +759,7 @@ LDEMUL_CREATE_OUTPUT_SECTION_STATEMENTS=arm_elf_create_output_section_statements
 
 # Replace the elf before_parse function with our own.
 LDEMUL_BEFORE_PARSE=gld"${EMULATION_NAME}"_before_parse
+LDEMUL_SET_SYMBOLS=gld"${EMULATION_NAME}"_set_symbols
 
 # Call the extra arm-elf function
 LDEMUL_FINISH=gld${EMULATION_NAME}_finish