m68k: Drop CONFIG_MCFPIT support

[platform/kernel/u-boot.git] / include / usb / ehci-ci.h

diff --git a/include/usb/ehci-ci.h b/include/usb/ehci-ci.h
index 725aec5..efb2eec 100644 (file)
--- a/include/usb/ehci-ci.h
+++ b/include/usb/ehci-ci.h
@@ -1,9 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
 /*
  * Copyright (c) 2005, 2009 Freescale Semiconductor, Inc
  * Copyright (c) 2005 MontaVista Software
  * Copyright (c) 2008 Excito Elektronik i Sk=E5ne AB
- *
- * SPDX-License-Identifier:    GPL-2.0+
  */
 
 #ifndef _EHCI_CI_H
@@ -97,10 +96,6 @@
 #define INTR_DATA_PULSING_EN   (0x1<<30)
 #define INTSTS_MASK            (0x00ff0000)
 
-/* USBCMD Bits of interest */
-#define EHCI_FSL_USBCMD_RST    (1 <<  1)
-#define EHCI_FSL_USBCMD_RS     (1 <<  0)
-
 #define  INTERRUPT_ENABLE_BITS_MASK  \
                (INTR_USB_ID_EN         | \
                INTR_1MS_TIMER_EN       | \
@@ -152,7 +147,7 @@
 
 #if defined(CONFIG_MPC83xx)
 #define CONFIG_SYS_FSL_USB1_ADDR CONFIG_SYS_MPC83xx_USB1_ADDR
-#if defined(CONFIG_MPC834x)
+#if defined(CONFIG_ARCH_MPC834X)
 #define CONFIG_SYS_FSL_USB2_ADDR CONFIG_SYS_MPC83xx_USB2_ADDR
 #else
 #define CONFIG_SYS_FSL_USB2_ADDR       0
@@ -160,11 +155,8 @@
 #elif defined(CONFIG_MPC85xx)
 #define CONFIG_SYS_FSL_USB1_ADDR CONFIG_SYS_MPC85xx_USB1_ADDR
 #define CONFIG_SYS_FSL_USB2_ADDR CONFIG_SYS_MPC85xx_USB2_ADDR
-#elif defined(CONFIG_MPC512X)
-#define CONFIG_SYS_FSL_USB1_ADDR CONFIG_SYS_MPC512x_USB1_ADDR
-#define CONFIG_SYS_FSL_USB2_ADDR       0
-#elif defined(CONFIG_LS102XA)
-#define CONFIG_SYS_FSL_USB1_ADDR CONFIG_SYS_LS102XA_USB1_ADDR
+#elif defined(CONFIG_ARCH_LS1021A) || defined(CONFIG_ARCH_LS1012A)
+#define CONFIG_SYS_FSL_USB1_ADDR CONFIG_SYS_EHCI_USB1_ADDR
 #define CONFIG_SYS_FSL_USB2_ADDR        0
 #endif
 
@@ -191,7 +183,11 @@ struct usb_ehci {
        u32     gptimer1_ld;    /* 0x088 - General Purpose Timer 1 load value */
        u32     gptimer1_ctrl;  /* 0x08C - General Purpose Timer 1 control */
        u32     sbuscfg;        /* 0x090 - System Bus Interface Control */
-       u8      res2[0x6C];
+       u32     sbusstatus;     /* 0x094 - System Bus Interface Status */
+       u32     sbusmode;       /* 0x098 - System Bus Interface Mode */
+       u32     genconfig;      /* 0x09C - USB Core Configuration */
+       u32     genconfig2;     /* 0x0A0 - USB Core Configuration 2 */
+       u8      res2[0x5c];
        u8      caplength;      /* 0x100 - Capability Register Length */
        u8      res3[0x1];
        u16     hciversion;     /* 0x102 - Host Interface Version */
@@ -283,6 +279,7 @@ struct usb_ehci {
 int usb_phy_mode(int port);
 /* Board-specific initialization */
 int board_ehci_hcd_init(int port);
+int board_ehci_power(int port, int on);
 int board_usb_phy_mode(int port);
 
 #endif /* _EHCI_CI_H */