#include <linux/bitops.h>
/* SPI mode flags */
-#define SPI_CPHA BIT(0) /* clock phase */
-#define SPI_CPOL BIT(1) /* clock polarity */
+#define SPI_CPHA BIT(0) /* clock phase (1 = SPI_CLOCK_PHASE_SECOND) */
+#define SPI_CPOL BIT(1) /* clock polarity (1 = SPI_POLARITY_HIGH) */
#define SPI_MODE_0 (0|0) /* (original MicroWire) */
#define SPI_MODE_1 (0|SPI_CPHA)
#define SPI_MODE_2 (SPI_CPOL|0)
#define SPI_DEFAULT_WORDLEN 8
-#ifdef CONFIG_DM_SPI
/* TODO(sjg@chromium.org): Remove this and use max_hz from struct spi_slave */
struct dm_spi_bus {
uint max_hz;
uint mode;
};
-#endif /* CONFIG_DM_SPI */
-
/**
* enum spi_clock_phase - indicates the clock phase to use for SPI (CPHA)
*
* @flags: Indication of SPI flags.
*/
struct spi_slave {
-#ifdef CONFIG_DM_SPI
+#if CONFIG_IS_ENABLED(DM_SPI)
struct udevice *dev; /* struct spi_slave is dev->parentdata */
uint max_hz;
uint speed;
*/
int spi_cs_is_valid(unsigned int bus, unsigned int cs);
-#ifndef CONFIG_DM_SPI
+/*
+ * These names are used in several drivers and these declarations will be
+ * removed soon as part of the SPI DM migration. Drop them if driver model is
+ * enabled for SPI.
+ */
+#if !CONFIG_IS_ENABLED(DM_SPI)
/**
* Activate a SPI chipselect.
* This function is provided by the board code when using a driver
* select to the device identified by "slave".
*/
void spi_cs_deactivate(struct spi_slave *slave);
+#endif
/**
* Set transfer speed.
* @hz: The transfer speed
*/
void spi_set_speed(struct spi_slave *slave, uint hz);
-#endif
/**
* Write 8 bits, then read 8 bits.
return ret < 0 ? ret : din[1];
}
-#ifdef CONFIG_DM_SPI
-
/**
* struct spi_cs_info - Information about a bus chip select
*
/* Access the operations for a SPI device */
#define spi_get_ops(dev) ((struct dm_spi_ops *)(dev)->driver->ops)
#define spi_emul_get_ops(dev) ((struct dm_spi_emul_ops *)(dev)->driver->ops)
-#endif /* CONFIG_DM_SPI */
#endif /* _SPI_H_ */