ppc4xx: Big cleanup of PPC4xx defines

[platform/kernel/u-boot.git] / include / s3c6400.h

diff --git a/include/s3c6400.h b/include/s3c6400.h
index fd3e99b..e527c08 100644 (file)
--- a/include/s3c6400.h
+++ b/include/s3c6400.h
@@ -31,10 +31,6 @@
 #ifndef __S3C6400_H__
 #define __S3C6400_H__
 
-#ifndef CONFIG_S3C6400
-#define CONFIG_S3C6400         1
-#endif
-
 #define S3C64XX_UART_CHANNELS  3
 #define S3C64XX_SPI_CHANNELS   2
 
@@ -215,9 +211,9 @@
 #define GPACONSLP_OFFSET       0x0C
 #define GPAPUDSLP_OFFSET       0x10
 #define GPBCON_OFFSET          0x20
-#define GPBDAT_OFFSET          0x04
-#define GPBPUD_OFFSET          0x08
-#define GPBCONSLP_OFFSET       0x0C
+#define GPBDAT_OFFSET          0x24
+#define GPBPUD_OFFSET          0x28
+#define GPBCONSLP_OFFSET       0x2C
 #define GPBPUDSLP_OFFSET       0x30
 #define GPCCON_OFFSET          0x40
 #define GPCDAT_OFFSET          0x44
@@ -380,6 +376,11 @@
  */
 #define ELFIN_MEM_SYS_CFG      0x7e00f120
 
+#define S3C64XX_MEM_SYS_CFG_16BIT      (1 << 12)
+
+#define S3C64XX_MEM_SYS_CFG_NAND       0x0008
+#define S3C64XX_MEM_SYS_CFG_ONENAND    S3C64XX_MEM_SYS_CFG_16BIT
+
 #define GPACON         (ELFIN_GPIO_BASE + GPACON_OFFSET)
 #define GPADAT         (ELFIN_GPIO_BASE + GPADAT_OFFSET)
 #define GPAPUD         (ELFIN_GPIO_BASE + GPAPUD_OFFSET)