Merge branch 'next' of ../next

[platform/kernel/u-boot.git] / include / ppc440.h

diff --git a/include/ppc440.h b/include/ppc440.h
index e54a977..e60fa13 100644 (file)
--- a/include/ppc440.h
+++ b/include/ppc440.h
@@ -1276,7 +1276,8 @@
 #define CPC0_STRP1_PAE_MASK            (0x80000000 >> 11)
 #define CPC0_STRP1_PISE_MASK           (0x80000000 >> 13)
 #endif /* defined(CONFIG_440GP) */
-#if defined(CONFIG_440GX) || defined(CONFIG_440SP)
+#if defined(CONFIG_440GX) || defined(CONFIG_440SP) || \
+    defined(CONFIG_460EX) || defined(CONFIG_460GT)
 #define SDR0_SDSTP1_PAE_MASK           (0x80000000 >> 13)
 #define SDR0_SDSTP1_PISE_MASK          (0x80000000 >> 15)
 #endif /* defined(CONFIG_440GX) || defined(CONFIG_440SP) */
@@ -1713,25 +1714,6 @@
 #endif
 
 /*-----------------------------------------------------------------------------
-| IIC Register Offsets
-'----------------------------------------------------------------------------*/
-#define IICMDBUF               0x00
-#define IICSDBUF               0x02
-#define IICLMADR               0x04
-#define IICHMADR               0x05
-#define IICCNTL                        0x06
-#define IICMDCNTL              0x07
-#define IICSTS                 0x08
-#define IICEXTSTS              0x09
-#define IICLSADR               0x0A
-#define IICHSADR               0x0B
-#define IIC0_CLKDIV            0x0C
-#define IICINTRMSK             0x0D
-#define IICXFRCNT              0x0E
-#define IICXTCNTLSS            0x0F
-#define IICDIRECTCNTL          0x10
-
-/*-----------------------------------------------------------------------------
 | PCI Internal Registers et. al. (accessed via plb)
 +----------------------------------------------------------------------------*/
 #define PCIL0_CFGADR           (CONFIG_SYS_PCI_BASE + 0x0ec00000)