int asym_pause;
};
-/**
- * phy_read - Convenience function for reading a given PHY register
- * @phydev: the phy_device struct
- * @devad: The MMD to read from
- * @regnum: register number to read
- * @return: value for success or negative errno for failure
- */
-static inline int phy_read(struct phy_device *phydev, int devad, int regnum)
-{
- struct mii_dev *bus = phydev->bus;
-
- if (!bus || !bus->read) {
- debug("%s: No bus configured\n", __func__);
- return -1;
- }
-
- return bus->read(bus, phydev->addr, devad, regnum);
-}
-
-/**
- * phy_write - Convenience function for writing a given PHY register
- * @phydev: the phy_device struct
- * @devad: The MMD to read from
- * @regnum: register number to write
- * @val: value to write to @regnum
- * @return: 0 for success or negative errno for failure
- */
-static inline int phy_write(struct phy_device *phydev, int devad, int regnum,
- u16 val)
-{
- struct mii_dev *bus = phydev->bus;
-
- if (!bus || !bus->write) {
- debug("%s: No bus configured\n", __func__);
- return -1;
- }
-
- return bus->write(bus, phydev->addr, devad, regnum, val);
-}
-
-/**
- * phy_mmd_start_indirect - Convenience function for writing MMD registers
- * @phydev: the phy_device struct
- * @devad: The MMD to read from
- * @regnum: register number to write
- * @return: None
- */
-static inline void phy_mmd_start_indirect(struct phy_device *phydev, int devad,
- int regnum)
-{
- /* Write the desired MMD Devad */
- phy_write(phydev, MDIO_DEVAD_NONE, MII_MMD_CTRL, devad);
-
- /* Write the desired MMD register address */
- phy_write(phydev, MDIO_DEVAD_NONE, MII_MMD_DATA, regnum);
-
- /* Select the Function : DATA with no post increment */
- phy_write(phydev, MDIO_DEVAD_NONE, MII_MMD_CTRL,
- (devad | MII_MMD_CTRL_NOINCR));
-}
-
-/**
- * phy_read_mmd - Convenience function for reading a register
- * from an MMD on a given PHY.
- * @phydev: The phy_device struct
- * @devad: The MMD to read from
- * @regnum: The register on the MMD to read
- * @return: Value for success or negative errno for failure
- */
-static inline int phy_read_mmd(struct phy_device *phydev, int devad,
- int regnum)
-{
- struct phy_driver *drv = phydev->drv;
-
- if (regnum > (u16)~0 || devad > 32)
- return -EINVAL;
-
- /* driver-specific access */
- if (drv->read_mmd)
- return drv->read_mmd(phydev, devad, regnum);
-
- /* direct C45 / C22 access */
- if ((drv->features & PHY_10G_FEATURES) == PHY_10G_FEATURES ||
- devad == MDIO_DEVAD_NONE || !devad)
- return phy_read(phydev, devad, regnum);
-
- /* indirect C22 access */
- phy_mmd_start_indirect(phydev, devad, regnum);
-
- /* Read the content of the MMD's selected register */
- return phy_read(phydev, MDIO_DEVAD_NONE, MII_MMD_DATA);
-}
-
-/**
- * phy_write_mmd - Convenience function for writing a register
- * on an MMD on a given PHY.
- * @phydev: The phy_device struct
- * @devad: The MMD to read from
- * @regnum: The register on the MMD to read
- * @val: value to write to @regnum
- * @return: 0 for success or negative errno for failure
- */
-static inline int phy_write_mmd(struct phy_device *phydev, int devad,
- int regnum, u16 val)
-{
- struct phy_driver *drv = phydev->drv;
-
- if (regnum > (u16)~0 || devad > 32)
- return -EINVAL;
-
- /* driver-specific access */
- if (drv->write_mmd)
- return drv->write_mmd(phydev, devad, regnum, val);
-
- /* direct C45 / C22 access */
- if ((drv->features & PHY_10G_FEATURES) == PHY_10G_FEATURES ||
- devad == MDIO_DEVAD_NONE || !devad)
- return phy_write(phydev, devad, regnum, val);
-
- /* indirect C22 access */
- phy_mmd_start_indirect(phydev, devad, regnum);
-
- /* Write the data into MMD's selected register */
- return phy_write(phydev, MDIO_DEVAD_NONE, MII_MMD_DATA, val);
-}
-
-/**
- * phy_set_bits_mmd - Convenience function for setting bits in a register
- * on MMD
- * @phydev: the phy_device struct
- * @devad: the MMD containing register to modify
- * @regnum: register number to modify
- * @val: bits to set
- * @return: 0 for success or negative errno for failure
- */
-static inline int phy_set_bits_mmd(struct phy_device *phydev, int devad,
- u32 regnum, u16 val)
-{
- int value, ret;
-
- value = phy_read_mmd(phydev, devad, regnum);
- if (value < 0)
- return value;
-
- value |= val;
-
- ret = phy_write_mmd(phydev, devad, regnum, value);
- if (ret < 0)
- return ret;
-
- return 0;
-}
-
-/**
- * phy_clear_bits_mmd - Convenience function for clearing bits in a register
- * on MMD
- * @phydev: the phy_device struct
- * @devad: the MMD containing register to modify
- * @regnum: register number to modify
- * @val: bits to clear
- * @return: 0 for success or negative errno for failure
- */
-static inline int phy_clear_bits_mmd(struct phy_device *phydev, int devad,
- u32 regnum, u16 val)
-{
- int value, ret;
-
- value = phy_read_mmd(phydev, devad, regnum);
- if (value < 0)
- return value;
-
- value &= ~val;
-
- ret = phy_write_mmd(phydev, devad, regnum, value);
- if (ret < 0)
- return ret;
-
- return 0;
-}
-
#ifdef CONFIG_PHYLIB_10G
extern struct phy_driver gen10g_driver;
#endif
* @return: pointer to phy_device if a PHY is found,
* or NULL otherwise
*/
-struct phy_device *phy_connect_phy_id(struct mii_dev *bus, struct udevice *dev);
+struct phy_device *phy_connect_phy_id(struct mii_dev *bus, struct udevice *dev,
+ int phyaddr);
static inline ofnode phy_get_ofnode(struct phy_device *phydev)
{
return ofnode_null();
}
#endif
+
+int phy_read(struct phy_device *phydev, int devad, int regnum);
+int phy_write(struct phy_device *phydev, int devad, int regnum, u16 val);
+void phy_mmd_start_indirect(struct phy_device *phydev, int devad, int regnum);
+int phy_read_mmd(struct phy_device *phydev, int devad, int regnum);
+int phy_write_mmd(struct phy_device *phydev, int devad, int regnum, u16 val);
+int phy_set_bits_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val);
+int phy_clear_bits_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val);
+
int phy_startup(struct phy_device *phydev);
int phy_config(struct phy_device *phydev);
int phy_shutdown(struct phy_device *phydev);
int phy_register(struct phy_driver *drv);
int phy_set_supported(struct phy_device *phydev, u32 max_speed);
+int phy_modify(struct phy_device *phydev, int devad, int regnum, u16 mask,
+ u16 set);
int genphy_config_aneg(struct phy_device *phydev);
int genphy_restart_aneg(struct phy_device *phydev);
int genphy_update_link(struct phy_device *phydev);
int phy_micrel_ksz90x1_init(void);
int phy_meson_gxl_init(void);
int phy_natsemi_init(void);
+int phy_nxp_c45_tja11xx_init(void);
int phy_nxp_tja11xx_init(void);
int phy_realtek_init(void);
int phy_smsc_init(void);
phydev->interface <= PHY_INTERFACE_MODE_QSGMII;
}
+bool phy_interface_is_ncsi(void);
+
/* PHY UIDs for various PHYs that are referenced in external code */
#define PHY_UID_CS4340 0x13e51002
#define PHY_UID_CS4223 0x03e57003