int pci_hose_find_ext_capability(struct pci_controller *hose,
pci_dev_t dev, int cap);
-#ifdef CONFIG_PCI_FIXUP_DEV
-extern void board_pci_fixup_dev(struct pci_controller *hose, pci_dev_t dev,
- unsigned short vendor,
- unsigned short device,
- unsigned short class);
-#endif
#endif /* !defined(CONFIG_DM_PCI) || defined(CONFIG_DM_PCI_COMPAT) */
const char * pci_class_str(u8 class);
* PCI buses must support reading and writing configuration values
* so that the bus can be scanned and its devices configured.
*
- * Normally PCI_BUS(@bdf) is the same as @bus->seq, but not always.
+ * Normally PCI_BUS(@bdf) is the same as @dev_seq(bus), but not always.
* If bridges exist it is possible to use the top-level bus to
* access a sub-bus. In that case @bus will be the top-level bus
* and PCI_BUS(bdf) will be a different (higher) value
*/
int sandbox_pci_get_client(struct udevice *emul, struct udevice **devp);
+/**
+ * board_pci_fixup_dev() - Board callback for PCI device fixups
+ *
+ * @bus: PCI bus
+ * @dev: PCI device
+ */
+extern void board_pci_fixup_dev(struct udevice *bus, struct udevice *dev);
+
#endif /* CONFIG_DM_PCI */
/**