#define PCI_EXP_LNKSTA_DLLLA 0x2000 /* Data Link Layer Link Active */
#define PCI_EXP_SLTCAP 20 /* Slot Capabilities */
#define PCI_EXP_SLTCAP_PSN 0xfff80000 /* Physical Slot Number */
+#define PCI_EXP_RTCTL 28 /* Root Control */
+#define PCI_EXP_RTCTL_CRSSVE 0x0010 /* CRS Software Visibility Enable */
+#define PCI_EXP_RTCAP 30 /* Root Capabilities */
+#define PCI_EXP_RTCAP_CRSVIS 0x0001 /* CRS Software Visibility capability */
+#define PCI_EXP_DEVCAP2 36 /* Device Capabilities 2 */
+#define PCI_EXP_DEVCAP2_ARI 0x00000020 /* ARI Forwarding Supported */
+#define PCI_EXP_DEVCTL2 40 /* Device Control 2 */
+#define PCI_EXP_DEVCTL2_ARI 0x0020 /* Alternative Routing-ID */
+
#define PCI_EXP_LNKCTL2 48 /* Link Control 2 */
/* Single Root I/O Virtualization Registers */
#define PCI_SRIOV_CAP 0x04 /* SR-IOV Capabilities */
#define PCI_SRIOV_CTRL 0x08 /* SR-IOV Control */
#define PCI_SRIOV_CTRL_VFE 0x01 /* VF Enable */
#define PCI_SRIOV_CTRL_MSE 0x08 /* VF Memory Space Enable */
+#define PCI_SRIOV_CTRL_ARI 0x10 /* ARI Capable Hierarchy */
#define PCI_SRIOV_INITIAL_VF 0x0c /* Initial VFs */
#define PCI_SRIOV_TOTAL_VF 0x0e /* Total VFs */
#define PCI_SRIOV_NUM_VF 0x10 /* Number of VFs */
#define PCI_MASK_BUS(bdf) ((bdf) & 0xffff)
#define PCI_ADD_BUS(bus, devfn) (((bus) << 16) | (devfn))
#define PCI_BDF(b, d, f) ((b) << 16 | PCI_DEVFN(d, f))
-#define PCI_VENDEV(v, d) (((v) << 16) | (d))
#define PCI_ANY_ID (~0)
/* Convert from Linux format to U-Boot format */
* about a small subset of PCI devices. This is normally false.
*/
struct pci_controller {
-#ifdef CONFIG_DM_PCI
struct udevice *bus;
struct udevice *ctlr;
bool skip_auto_config_until_reloc;
-#else
- struct pci_controller *next;
-#endif
int first_busno;
int last_busno;
struct pci_config_table *config_table;
void (*fixup_irq)(struct pci_controller *, pci_dev_t);
-#ifndef CONFIG_DM_PCI
- /* Low-level architecture-dependent routines */
- int (*read_byte)(struct pci_controller*, pci_dev_t, int where, u8 *);
- int (*read_word)(struct pci_controller*, pci_dev_t, int where, u16 *);
- int (*read_dword)(struct pci_controller*, pci_dev_t, int where, u32 *);
- int (*write_byte)(struct pci_controller*, pci_dev_t, int where, u8);
- int (*write_word)(struct pci_controller*, pci_dev_t, int where, u16);
- int (*write_dword)(struct pci_controller*, pci_dev_t, int where, u32);
-#endif
/* Used by auto config */
struct pci_region *pci_mem, *pci_io, *pci_prefetch;
-
-#ifndef CONFIG_DM_PCI
- int current_busno;
-
- void *priv_data;
-#endif
};
-#ifndef CONFIG_DM_PCI
-static inline void pci_set_ops(struct pci_controller *hose,
- int (*read_byte)(struct pci_controller*,
- pci_dev_t, int where, u8 *),
- int (*read_word)(struct pci_controller*,
- pci_dev_t, int where, u16 *),
- int (*read_dword)(struct pci_controller*,
- pci_dev_t, int where, u32 *),
- int (*write_byte)(struct pci_controller*,
- pci_dev_t, int where, u8),
- int (*write_word)(struct pci_controller*,
- pci_dev_t, int where, u16),
- int (*write_dword)(struct pci_controller*,
- pci_dev_t, int where, u32)) {
- hose->read_byte = read_byte;
- hose->read_word = read_word;
- hose->read_dword = read_dword;
- hose->write_byte = write_byte;
- hose->write_word = write_word;
- hose->write_dword = write_dword;
-}
-#endif
-
-#ifdef CONFIG_PCI_INDIRECT_BRIDGE
-extern void pci_setup_indirect(struct pci_controller* hose, u32 cfg_addr, u32 cfg_data);
-#endif
-
-#if !defined(CONFIG_DM_PCI) || defined(CONFIG_DM_PCI_COMPAT)
+#if defined(CONFIG_DM_PCI_COMPAT)
extern phys_addr_t pci_hose_bus_to_phys(struct pci_controller* hose,
pci_addr_t addr, unsigned long flags);
extern pci_addr_t pci_hose_phys_to_bus(struct pci_controller* hose,
pci_dev_t dev, int where, u32 val);
#endif
-#ifndef CONFIG_DM_PCI
-extern int pci_read_config_byte(pci_dev_t dev, int where, u8 *val);
-extern int pci_read_config_word(pci_dev_t dev, int where, u16 *val);
-extern int pci_read_config_dword(pci_dev_t dev, int where, u32 *val);
-extern int pci_write_config_byte(pci_dev_t dev, int where, u8 val);
-extern int pci_write_config_word(pci_dev_t dev, int where, u16 val);
-extern int pci_write_config_dword(pci_dev_t dev, int where, u32 val);
-#endif
-
void pciauto_region_init(struct pci_region *res);
void pciauto_region_align(struct pci_region *res, pci_size_t size);
void pciauto_config_init(struct pci_controller *hose);
*/
int pciauto_region_allocate(struct pci_region *res, pci_size_t size,
pci_addr_t *bar, bool supports_64bit);
+int pci_skip_dev(struct pci_controller *hose, pci_dev_t dev);
-#if !defined(CONFIG_DM_PCI) || defined(CONFIG_DM_PCI_COMPAT)
+#if defined(CONFIG_DM_PCI_COMPAT)
extern int pci_hose_read_config_byte_via_dword(struct pci_controller *hose,
pci_dev_t dev, int where, u8 *val);
extern int pci_hose_read_config_word_via_dword(struct pci_controller *hose,
extern struct pci_controller *find_hose_by_cfg_addr(void *cfg_addr);
extern struct pci_controller *pci_get_hose_head(void);
-extern int pci_skip_dev(struct pci_controller *hose, pci_dev_t dev);
extern int pci_hose_scan(struct pci_controller *hose);
extern int pci_hose_scan_bus(struct pci_controller *hose, int bus);
int pci_hose_find_ext_capability(struct pci_controller *hose,
pci_dev_t dev, int cap);
-#ifdef CONFIG_PCI_FIXUP_DEV
-extern void board_pci_fixup_dev(struct pci_controller *hose, pci_dev_t dev,
- unsigned short vendor,
- unsigned short device,
- unsigned short class);
-#endif
-#endif /* !defined(CONFIG_DM_PCI) || defined(CONFIG_DM_PCI_COMPAT) */
+#endif /* defined(CONFIG_DM_PCI_COMPAT) */
const char * pci_class_str(u8 class);
int pci_last_busno(void);
extern void pci_mpc85xx_init (struct pci_controller *hose);
#endif
-#ifdef CONFIG_PCIE_IMX
-extern void imx_pcie_remove(void);
-#endif
-
-#if !defined(CONFIG_DM_PCI) || defined(CONFIG_DM_PCI_COMPAT)
/**
* pci_write_bar32() - Write the address of a BAR including control bits
*
* with devices which require hard-coded addresses, not part of the normal
* PCI enumeration process.
*
+ * This is only available if CONFIG_DM_PCI_COMPAT is enabled
+ *
* @hose: PCI hose to use
* @dev: PCI device to update
* @barnum: BAR number (0-5)
/**
* pci_read_bar32() - read the address of a bar
*
+ * This is only available if CONFIG_DM_PCI_COMPAT is enabled
+ *
* @hose: PCI hose to use
* @dev: PCI device to inspect
* @barnum: BAR number (0-5)
/**
* pci_hose_find_devices() - Find devices by vendor/device ID
*
+ * This is only available if CONFIG_DM_PCI_COMPAT is enabled
+ *
* @hose: PCI hose to search
* @busnum: Bus number to search
* @ids: PCI vendor/device IDs to look for, terminated by 0, 0 record
*/
pci_dev_t pci_hose_find_devices(struct pci_controller *hose, int busnum,
struct pci_device_id *ids, int *indexp);
-#endif /* !CONFIG_DM_PCI || CONFIG_DM_PCI_COMPAT */
/* Access sizes for PCI reads and writes */
enum pci_size_t {
struct udevice;
-#ifdef CONFIG_DM_PCI
/**
- * struct pci_child_platdata - information stored about each PCI device
+ * struct pci_child_plat - information stored about each PCI device
*
* Every device on a PCI bus has this per-child data.
*
- * It can be accessed using dev_get_parent_platdata(dev) if dev->parent is a
+ * It can be accessed using dev_get_parent_plat(dev) if dev->parent is a
* PCI bus (i.e. UCLASS_PCI)
*
* @devfn: Encoded device and function index - see PCI_DEVFN()
* @pfdev: Handle to Physical Function device
* @virtid: Virtual Function Index
*/
-struct pci_child_platdata {
+struct pci_child_plat {
int devfn;
unsigned short vendor;
unsigned short device;
* PCI buses must support reading and writing configuration values
* so that the bus can be scanned and its devices configured.
*
- * Normally PCI_BUS(@bdf) is the same as @bus->seq, but not always.
+ * Normally PCI_BUS(@bdf) is the same as @dev_seq(bus), but not always.
* If bridges exist it is possible to use the top-level bus to
* access a sub-bus. In that case @bus will be the top-level bus
* and PCI_BUS(bdf) will be a different (higher) value
* @devp: Returns matching device if found
* @return 0 if found, -ENODEV if not
*/
-int pci_bus_find_devices(struct udevice *bus, struct pci_device_id *ids,
+int pci_bus_find_devices(struct udevice *bus, const struct pci_device_id *ids,
int *indexp, struct udevice **devp);
/**
* @devp: Returns matching device if found
* @return 0 if found, -ENODEV if not
*/
-int pci_find_device_id(struct pci_device_id *ids, int index,
+int pci_find_device_id(const struct pci_device_id *ids, int index,
struct udevice **devp);
/**
*/
int sandbox_pci_get_client(struct udevice *emul, struct udevice **devp);
-#endif /* CONFIG_DM_PCI */
+/**
+ * board_pci_fixup_dev() - Board callback for PCI device fixups
+ *
+ * @bus: PCI bus
+ * @dev: PCI device
+ */
+extern void board_pci_fixup_dev(struct udevice *bus, struct udevice *dev);
/**
* PCI_DEVICE - macro used to describe a specific pci device
projects / platform / kernel / u-boot.git / blobdiff