Rename CONFIG_EHCI_IS_TDI to CONFIG_USB_EHCI_IS_TDI

[platform/kernel/u-boot.git] / include / pci.h

diff --git a/include/pci.h b/include/pci.h
index 0fc22ad..797f224 100644 (file)
--- a/include/pci.h
+++ b/include/pci.h
@@ -495,6 +495,10 @@
 #define  PCI_EXP_LNKSTA_DLLLA  0x2000  /* Data Link Layer Link Active */
 #define PCI_EXP_SLTCAP         20      /* Slot Capabilities */
 #define  PCI_EXP_SLTCAP_PSN    0xfff80000 /* Physical Slot Number */
+#define PCI_EXP_RTCTL          28      /* Root Control */
+#define  PCI_EXP_RTCTL_CRSSVE  0x0010  /* CRS Software Visibility Enable */
+#define PCI_EXP_RTCAP          30      /* Root Capabilities */
+#define  PCI_EXP_RTCAP_CRSVIS  0x0001  /* CRS Software Visibility capability */
 #define PCI_EXP_DEVCAP2                36      /* Device Capabilities 2 */
 #define  PCI_EXP_DEVCAP2_ARI   0x00000020 /* ARI Forwarding Supported */
 #define PCI_EXP_DEVCTL2                40      /* Device Control 2 */
@@ -724,6 +728,7 @@ void pciauto_config_init(struct pci_controller *hose);
  */
 int pciauto_region_allocate(struct pci_region *res, pci_size_t size,
                            pci_addr_t *bar, bool supports_64bit);
+int pci_skip_dev(struct pci_controller *hose, pci_dev_t dev);
 
 #if defined(CONFIG_DM_PCI_COMPAT)
 extern int pci_hose_read_config_byte_via_dword(struct pci_controller *hose,
@@ -741,7 +746,6 @@ extern struct pci_controller* pci_bus_to_hose(int bus);
 extern struct pci_controller *find_hose_by_cfg_addr(void *cfg_addr);
 extern struct pci_controller *pci_get_hose_head(void);
 
-extern int pci_skip_dev(struct pci_controller *hose, pci_dev_t dev);
 extern int pci_hose_scan(struct pci_controller *hose);
 extern int pci_hose_scan_bus(struct pci_controller *hose, int bus);