Merge tag 'pull-24apr19' of git://git.denx.de/u-boot-dm

[platform/kernel/u-boot.git] / include / pci.h

diff --git a/include/pci.h b/include/pci.h
index 936cfe9..066238a 100644 (file)
--- a/include/pci.h
+++ b/include/pci.h
@@ -405,6 +405,7 @@
 #define  PCI_MSI_FLAGS_QSIZE   0x70    /* Message queue size configured */
 #define  PCI_MSI_FLAGS_QMASK   0x0e    /* Maximum queue size available */
 #define  PCI_MSI_FLAGS_ENABLE  0x01    /* MSI feature enabled */
+#define  PCI_MSI_FLAGS_MASKBIT 0x0100  /* Per-vector masking capable */
 #define PCI_MSI_RFU            3       /* Rest of capability flags */
 #define PCI_MSI_ADDRESS_LO     4       /* Lower 32 bits */
 #define PCI_MSI_ADDRESS_HI     8       /* Upper 32 bits (if PCI_MSI_FLAGS_64BIT set) */
@@ -499,9 +500,20 @@ static inline void pci_set_region(struct pci_region *reg,
 typedef int pci_dev_t;
 
 #define PCI_BUS(d)             (((d) >> 16) & 0xff)
+
+/*
+ * Please note the difference in DEVFN usage in U-Boot vs Linux. U-Boot
+ * uses DEVFN in bits 15-8 but Linux instead expects DEVFN in bits 7-0.
+ * Please see the Linux header include/uapi/linux/pci.h for more details.
+ * This is relevant for the following macros:
+ * PCI_DEV, PCI_FUNC, PCI_DEVFN
+ * The U-Boot macro PCI_DEV is equivalent to the Linux PCI_SLOT version with
+ * the remark from above (input d in bits 15-8 instead of 7-0.
+ */
 #define PCI_DEV(d)             (((d) >> 11) & 0x1f)
 #define PCI_FUNC(d)            (((d) >> 8) & 0x7)
 #define PCI_DEVFN(d, f)                ((d) << 11 | (f) << 8)
+
 #define PCI_MASK_BUS(bdf)      ((bdf) & 0xffff)
 #define PCI_ADD_BUS(bus, devfn)        (((bus) << 16) | (devfn))
 #define PCI_BDF(b, d, f)       ((b) << 16 | PCI_DEVFN(d, f))
@@ -534,7 +546,11 @@ extern void pci_cfgfunc_do_nothing(struct pci_controller* hose, pci_dev_t dev,
 extern void pci_cfgfunc_config_device(struct pci_controller* hose, pci_dev_t dev,
                                      struct pci_config_table *);
 
-#define MAX_PCI_REGIONS                7
+#ifdef CONFIG_NR_DRAM_BANKS
+#define MAX_PCI_REGIONS (CONFIG_NR_DRAM_BANKS + 7)
+#else
+#define MAX_PCI_REGIONS 7
+#endif
 
 #define INDIRECT_TYPE_NO_PCIE_LINK     1