+2010-12-26 John David Anglin <dave.anglin@nrc-cnrc.gc.ca>
+
+ PR gas/11395
+ * hppa.h: Clear "d" bit in "add" and "sub" patterns.
+
+2010-12-18 Richard Sandiford <rdsandiford@googlemail.com>
+
+ * mips.h: Update commentary after last commit.
+
+2010-12-18 Mingjie Xing <mingjie.xing@gmail.com>
+
+ * mips.h (OP_*_OFFSET_A, OP_*_OFFSET_B, OP_*_OFFSET_C)
+ (OP_*_RZ, OP_*_FZ, INSN2_M_FP_D, INSN2_WRITE_GPR_Z, INSN2_WRITE_FPR_Z)
+ (INSN2_READ_GPR_Z, INSN2_READ_FPR_Z, INSN2_READ_GPR_D): Define.
+
+2010-11-23 Richard Sandiford <rdsandiford@googlemail.com>
+
+ * mips.h: Fix previous commit.
+
+2010-11-23 Maciej W. Rozycki <macro@linux-mips.org>
+
+ * mips.h (INSN_CHIP_MASK): Update according to INSN_LOONGSON_3A.
+ (INSN_LOONGSON_3A): Clear bit 31.
+
+2010-11-15 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
+
+ PR gas/12198
+ * arm.h (ARM_AEXT_V6M_ONLY): New define.
+ (ARM_AEXT_V6M): Rewrite in terms of ARM_AEXT_V6M_ONLY.
+ (ARM_ARCH_V6M_ONLY): New define.
+
+2010-11-11 Mingming Sun <mingm.sun@gmail.com>
+
+ * mips.h (INSN_LOONGSON_3A): Defined.
+ (CPU_LOONGSON_3A): Defined.
+ (OPCODE_IS_MEMBER): Add LOONGSON_3A.
+
+2010-10-09 Matt Rice <ratmice@gmail.com>
+
+ * cgen.h (CGEN_ATTR, CGEN_ATTR_TYPE): Rename bool attribute to bool_.
+ (CGEN_ATTR_BOOLS, CGEN_ATTR_CGEN_INSN_ALIAS_VALUE): Likewise.
+
+2010-09-23 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
+
+ * arm.h (ARM_EXT_VIRT): New define.
+ (ARM_ARCH_V7A_IDIV_MP_SEC): Rename...
+ (ARM_ARCH_V7A_IDIV_MP_SEC_VIRT): ...to this and include Virtualization
+ Extensions.
+
+2010-09-23 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
+
+ * arm.h (ARM_AEXT_ADIV): New define.
+ (ARM_ARCH_V7A_IDIV_MP_SEC): Likewise.
+
+2010-09-23 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
+
+ * arm.h (ARM_EXT_OS): New define.
+ (ARM_AEXT_V6SM): Likewise.
+ (ARM_ARCH_V6SM): Likewise.
+
+2010-09-23 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
+
+ * arm.h (ARM_EXT_MP): Add.
+ (ARM_ARCH_V7A_MP): Likewise.
+
+2010-09-22 Mike Frysinger <vapier@gentoo.org>
+
+ * bfin.h: Declare pseudoChr structs/defines.
+
+2010-09-21 Mike Frysinger <vapier@gentoo.org>
+
+ * bfin.h: Strip trailing whitespace.
+
+2010-07-29 DJ Delorie <dj@redhat.com>
+
+ * rx.h (RX_Operand_Type): Add TwoReg.
+ (RX_Opcode_ID): Remove ediv and ediv2.
+
+2010-07-27 DJ Delorie <dj@redhat.com>
+
+ * rx.h (RX_Opcode_ID): Add nop2 and nop3 for statistics.
+
+2010-07-23 Naveen.H.S <naveen.S@kpitcummins.com>
+ Ina Pandit <ina.pandit@kpitcummins.com>
+
+ * v850.h: Define PROCESSOR_MASK, PROCESSOR_OPTION_EXTENSION,
+ PROCESSOR_OPTION_ALIAS, PROCESSOR_V850E2, PROCESSOR_V850E2V3 and
+ PROCESSOR_V850E2_ALL.
+ Remove PROCESSOR_V850EA support.
+ (v850_operand): Define V850_OPERAND_EP, V850_OPERAND_FLOAT_CC,
+ V850_OPERAND_VREG, V850E_IMMEDIATE16, V850E_IMMEDIATE16HI,
+ V850E_IMMEDIATE23, V850E_IMMEDIATE32, V850_OPERAND_SIGNED,
+ V850_OPERAND_DISP, V850_PCREL, V850_REG_EVEN, V850E_PUSH_POP,
+ V850_NOT_IMM0, V850_NOT_SA, V850_OPERAND_BANG and
+ V850_OPERAND_PERCENT.
+ Update V850_OPERAND_SRG, V850_OPERAND_CC, V850_OPERAND_RELAX and
+ V850_NOT_R0.
+ Remove V850_OPERAND_SIGNED, V850_OPERAND_EP, V850_OPERAND_DISP
+ and V850E_PUSH_POP
+
+2010-07-06 Maciej W. Rozycki <macro@codesourcery.com>
+
+ * mips.h (MIPS16_INSN_UNCOND_BRANCH): New macro.
+ (MIPS16_INSN_BRANCH): Rename to...
+ (MIPS16_INSN_COND_BRANCH): ... this.
+
+2010-07-03 Alan Modra <amodra@gmail.com>
+
+ * ppc.h (PPC_OPCODE_32, PPC_OPCODE_BOOKE64, PPC_OPCODE_CLASSIC): Delete.
+ Renumber other PPC_OPCODE defines.
+
+2010-07-03 Alan Modra <amodra@gmail.com>
+
+ * ppc.h (PPC_OPCODE_COMMON): Expand comment.
+
+2010-06-29 Alan Modra <amodra@gmail.com>
+
+ * maxq.h: Delete file.
+
+2010-06-14 Sebastian Andrzej Siewior <bigeasy@linutronix.de>
+
+ * ppc.h (PPC_OPCODE_E500): Define.
+
+2010-05-26 Catherine Moore <clm@codesourcery.com>
+
+ * opcode/mips.h (INSN_MIPS16): Remove.
+
+2010-04-21 Joseph Myers <joseph@codesourcery.com>
+
+ * tic6x-insn-formats.h (s_branch): Correct typo in bitmask.
+
+2010-04-15 Nick Clifton <nickc@redhat.com>
+
+ * alpha.h: Update copyright notice to use GPLv3.
+ * arc.h: Likewise.
+ * arm.h: Likewise.
+ * avr.h: Likewise.
+ * bfin.h: Likewise.
+ * cgen.h: Likewise.
+ * convex.h: Likewise.
+ * cr16.h: Likewise.
+ * cris.h: Likewise.
+ * crx.h: Likewise.
+ * d10v.h: Likewise.
+ * d30v.h: Likewise.
+ * dlx.h: Likewise.
+ * h8300.h: Likewise.
+ * hppa.h: Likewise.
+ * i370.h: Likewise.
+ * i386.h: Likewise.
+ * i860.h: Likewise.
+ * i960.h: Likewise.
+ * ia64.h: Likewise.
+ * m68hc11.h: Likewise.
+ * m68k.h: Likewise.
+ * m88k.h: Likewise.
+ * maxq.h: Likewise.
+ * mips.h: Likewise.
+ * mmix.h: Likewise.
+ * mn10200.h: Likewise.
+ * mn10300.h: Likewise.
+ * msp430.h: Likewise.
+ * np1.h: Likewise.
+ * ns32k.h: Likewise.
+ * or32.h: Likewise.
+ * pdp11.h: Likewise.
+ * pj.h: Likewise.
+ * pn.h: Likewise.
+ * ppc.h: Likewise.
+ * pyr.h: Likewise.
+ * rx.h: Likewise.
+ * s390.h: Likewise.
+ * score-datadep.h: Likewise.
+ * score-inst.h: Likewise.
+ * sparc.h: Likewise.
+ * spu-insns.h: Likewise.
+ * spu.h: Likewise.
+ * tic30.h: Likewise.
+ * tic4x.h: Likewise.
+ * tic54x.h: Likewise.
+ * tic80.h: Likewise.
+ * v850.h: Likewise.
+ * vax.h: Likewise.
+
+2010-03-25 Joseph Myers <joseph@codesourcery.com>
+
+ * tic6x-control-registers.h, tic6x-insn-formats.h,
+ tic6x-opcode-table.h, tic6x.h: New.
+
+2010-02-25 Wu Zhangjin <wuzhangjin@gmail.com>
+
+ * mips.h: (LOONGSON2F_NOP_INSN): New macro.
+
+2010-02-08 Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
+
+ * opcode/ppc.h (PPC_OPCODE_TITAN): Define.
+
+2010-01-14 H.J. Lu <hongjiu.lu@intel.com>
+
+ * ia64.h (ia64_find_opcode): Remove argument name.
+ (ia64_find_next_opcode): Likewise.
+ (ia64_dis_opcode): Likewise.
+ (ia64_free_opcode): Likewise.
+ (ia64_find_dependency): Likewise.
+
+2009-11-22 Doug Evans <dje@sebabeach.org>
+
+ * cgen.h: Include bfd_stdint.h.
+ (CGEN_INSN_LGSINT, CGEN_INSN_LGUINT): New types.
+
+2009-11-18 Paul Brook <paul@codesourcery.com>
+
+ * arm.h (FPU_VFP_V4_SP_D16, FPU_ARCH_VFP_V4_SP_D16): Define.
+
2009-11-17 Paul Brook <paul@codesourcery.com>
Daniel Jacobowitz <dan@codesourcery.com>
PR 3134
* h8300.h (h8_opcodes): Add an encoding for a mov.l instruction
with a 32-bit displacement but without the top bit of the 4th byte
- set.
+ set.
2008-02-18 M R Swami Reddy <MR.Swami.Reddy@nsc.com>
2006-10-24 Andrew Pinski <andrew_pinski@playstation.sony.com>
* ppc.h (PPC_OPCODE_CELL): Define.
-
+
2006-10-23 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
- * i386.h : Modify opcode to support for the change in POPCNT opcode
+ * i386.h : Modify opcode to support for the change in POPCNT opcode
in amdfam10 architecture.
2006-09-28 H.J. Lu <hongjiu.lu@intel.com>
2006-06-05 Thiemo Seufer <ths@mips.com>
- * mips.h: Improve description of MT flags.
+ * mips.h: Improve description of MT flags.
2006-05-25 Richard Sandiford <richard@codesourcery.com>
projects / external / binutils.git / blobdiff