#ifndef _miiphy_h_
#define _miiphy_h_
+#include <net.h>
-int miiphy_read(unsigned char addr, unsigned char reg, unsigned short * value);
-int miiphy_write(unsigned char addr, unsigned char reg, unsigned short value);
-int miiphy_info(unsigned char addr, unsigned int *oui, unsigned char *model,
- unsigned char *rev);
-int miiphy_reset(unsigned char addr);
-int miiphy_speed(unsigned char addr);
-int miiphy_duplex(unsigned char addr);
+int miiphy_read(char *devname, unsigned char addr, unsigned char reg,
+ unsigned short *value);
+int miiphy_write(char *devname, unsigned char addr, unsigned char reg,
+ unsigned short value);
+int miiphy_info(char *devname, unsigned char addr, unsigned int *oui,
+ unsigned char *model, unsigned char *rev);
+int miiphy_reset(char *devname, unsigned char addr);
+int miiphy_speed(char *devname, unsigned char addr);
+int miiphy_duplex(char *devname, unsigned char addr);
#ifdef CFG_FAULT_ECHO_LINK_DOWN
-int miiphy_link(unsigned char addr);
+int miiphy_link(char *devname, unsigned char addr);
#endif
+void miiphy_init(void);
+
+void miiphy_register(char *devname,
+ int (* read)(char *devname, unsigned char addr,
+ unsigned char reg, unsigned short *value),
+ int (* write)(char *devname, unsigned char addr,
+ unsigned char reg, unsigned short value));
+
+int miiphy_set_current_dev(char *devname);
+char *miiphy_get_current_dev(void);
+
+void miiphy_listdev(void);
+
+#define BB_MII_DEVNAME "bbmii"
+
+int bb_miiphy_read (char *devname, unsigned char addr,
+ unsigned char reg, unsigned short *value);
+int bb_miiphy_write (char *devname, unsigned char addr,
+ unsigned char reg, unsigned short value);
/* phy seed setup */
#define AUTO 99
#define PHY_BMCR_DPLX 0x0100
#define PHY_BMCR_COL_TST 0x0080
+#define PHY_BMCR_SPEED_MASK 0x2040
+#define PHY_BMCR_1000_MBPS 0x0040
+#define PHY_BMCR_100_MBPS 0x2000
+#define PHY_BMCR_10_MBPS 0x0000
+
/* phy BMSR */
#define PHY_BMSR_100T4 0x8000
#define PHY_BMSR_100TXF 0x4000
#define PHY_ANLPAR_10 0x0020
#define PHY_ANLPAR_100 0x0380 /* we can run at 100 */
+#define PHY_ANLPAR_PSB_MASK 0x001f
+#define PHY_ANLPAR_PSB_802_3 0x0001
+#define PHY_ANLPAR_PSB_802_9 0x0002
+
/* PHY_1000BTSR */
#define PHY_1000BTSR_MSCF 0x8000
#define PHY_1000BTSR_MSCR 0x4000