Convert CONFIG_SAMSUNG_ONENAND to Kconfig

[platform/kernel/u-boot.git] / include / k3-clk.h

diff --git a/include/k3-clk.h b/include/k3-clk.h
index 0735228..371f077 100644 (file)
--- a/include/k3-clk.h
+++ b/include/k3-clk.h
@@ -1,6 +1,6 @@
 /* SPDX-License-Identifier: GPL-2.0+ */
 /*
- * (C) Copyright 2020 - Texas Instruments Incorporated - http://www.ti.com
+ * (C) Copyright 2020-2021 Texas Instruments Incorporated - http://www.ti.com
  *      Tero Kristo <t-kristo@ti.com>
  */
 
@@ -54,6 +54,7 @@ struct div_data {
        u32 flags;
        int shift;
        int width;
+       u32 div_flags;
 };
 
 struct hfosc_data {
@@ -105,20 +106,23 @@ struct clk_data {
                .width = _width, .flags = _flags }                      \
        }
 
-#define CLK_DIV(_name, _parent, _reg, _shift, _width, _flags)  \
-       {                                                       \
-               .type = CLK_TYPE_DIV,                           \
-               .clk.div = {.name = _name, .parent = _parent, .reg = _reg, .shift = _shift, .width = _width, .flags = _flags } \
+#define CLK_DIV(_name, _parent, _reg, _shift, _width, _flags, _div_flags)      \
+       {                                                               \
+               .type = CLK_TYPE_DIV,                                   \
+               .clk.div = {                                            \
+                       .name = _name, .parent = _parent, .reg = _reg,  \
+                       .shift = _shift, .width = _width,               \
+                       .flags = _flags, .div_flags = _div_flags }      \
        }
 
-#define CLK_DIV_DEFFREQ(_name, _parent, _reg, _shift, _width, _flags, _freq) \
-       {                                                       \
-               .type = CLK_TYPE_DIV,                           \
-               .default_freq = _freq,                          \
-               .clk.div = {                                    \
-                       .name = _name, .parent = _parent,       \
-                       .reg = _reg, .shift = _shift,           \
-                       .width = _width, .flags = _flags }      \
+#define CLK_DIV_DEFFREQ(_name, _parent, _reg, _shift, _width, _flags, _div_flags, _freq) \
+       {                                                               \
+               .type = CLK_TYPE_DIV,                                   \
+               .default_freq = _freq,                                  \
+               .clk.div = {                                            \
+                       .name = _name, .parent = _parent, .reg = _reg,  \
+                       .shift = _shift, .width = _width,               \
+                       .flags = _flags, .div_flags = _div_flags }      \
        }
 
 #define CLK_PLL(_name, _parent, _reg,  _flags) \
@@ -169,6 +173,8 @@ struct ti_k3_clk_platdata {
 
 extern const struct ti_k3_clk_platdata j721e_clk_platdata;
 extern const struct ti_k3_clk_platdata j7200_clk_platdata;
+extern const struct ti_k3_clk_platdata j721s2_clk_platdata;
+extern const struct ti_k3_clk_platdata am62x_clk_platdata;
 
 struct clk *clk_register_ti_pll(const char *name, const char *parent_name,
                                void __iomem *reg);