crypto: caam: Add CAAM support to i.MX8M platforms

[platform/kernel/u-boot.git] / include / fsl_sec.h

diff --git a/include/fsl_sec.h b/include/fsl_sec.h
index a98f6cb..c531a14 100644 (file)
--- a/include/fsl_sec.h
+++ b/include/fsl_sec.h
@@ -3,6 +3,7 @@
  * Common internal memory map for some Freescale SoCs
  *
  * Copyright 2014 Freescale Semiconductor, Inc.
+ * Copyright 2018 NXP
  */
 
 #ifndef __FSL_SEC_H
@@ -195,7 +196,8 @@ typedef struct ccsr_sec {
 
 struct jr_regs {
 #if defined(CONFIG_SYS_FSL_SEC_LE) && \
-       !(defined(CONFIG_MX6) || defined(CONFIG_MX7) || defined(CONFIG_MX7ULP))
+       !(defined(CONFIG_MX6) || defined(CONFIG_MX7) || \
+         defined(CONFIG_MX7ULP) || defined(CONFIG_IMX8M))
        u32 irba_l;
        u32 irba_h;
 #else
@@ -209,7 +211,8 @@ struct jr_regs {
        u32 rsvd3;
        u32 irja;
 #if defined(CONFIG_SYS_FSL_SEC_LE) && \
-       !(defined(CONFIG_MX6) || defined(CONFIG_MX7) || defined(CONFIG_MX7ULP))
+       !(defined(CONFIG_MX6) || defined(CONFIG_MX7) || \
+         defined(CONFIG_MX7ULP) || defined(CONFIG_IMX8M))
        u32 orba_l;
        u32 orba_h;
 #else
@@ -242,7 +245,8 @@ struct jr_regs {
  */
 struct sg_entry {
 #if defined(CONFIG_SYS_FSL_SEC_LE) && \
-       !(defined(CONFIG_MX6) || defined(CONFIG_MX7) || defined(CONFIG_MX7ULP))
+       !(defined(CONFIG_MX6) || defined(CONFIG_MX7) || \
+         defined(CONFIG_MX7ULP) || defined(CONFIG_IMX8M))
        uint32_t addr_lo;       /* Memory Address - lo */
        uint32_t addr_hi;       /* Memory Address of start of buffer - hi */
 #else
@@ -263,7 +267,8 @@ struct sg_entry {
 
 #define BLOB_SIZE(x)           ((x) + 32 + 16) /* Blob buffer size */
 
-#if defined(CONFIG_MX6) || defined(CONFIG_MX7) || defined(CONFIG_MX7ULP)
+#if defined(CONFIG_MX6) || defined(CONFIG_MX7) || \
+       defined(CONFIG_MX7ULP) || defined(CONFIG_IMX8M)
 /* Job Ring Base Address */
 #define JR_BASE_ADDR(x) (CONFIG_SYS_FSL_SEC_ADDR + 0x1000 * (x + 1))
 /* Secure Memory Offset varies accross versions */