+/* SPDX-License-Identifier: GPL-2.0+ */
/*
* FSL SD/MMC Defines
*-------------------------------------------------------------------
*
* Copyright 2007-2008,2010-2011 Freescale Semiconductor, Inc
- *
- * SPDX-License-Identifier: GPL-2.0+
*/
#ifndef __FSL_ESDHC_H__
#define __FSL_ESDHC_H__
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <asm/byteorder.h>
/* needed for the mmc_cfg definition */
#define IRQSTATEN_TC (0x00000002)
#define IRQSTATEN_CC (0x00000001)
+#define ESDHCCTL 0x0002e40c
+#define ESDHCCTL_PCS (0x00080000)
+
#define PRSSTAT 0x0002e024
#define PRSSTAT_DAT0 (0x01000000)
#define PRSSTAT_CLSL (0x00800000)
#define PRSSTAT_CINS (0x00010000)
#define PRSSTAT_BREN (0x00000800)
#define PRSSTAT_BWEN (0x00000400)
+#define PRSSTAT_SDSTB (0X00000008)
#define PRSSTAT_DLA (0x00000004)
#define PRSSTAT_CICHB (0x00000002)
#define PRSSTAT_CIDHB (0x00000001)
#define PROCTL_INIT 0x00000020
#define PROCTL_DTW_4 0x00000002
#define PROCTL_DTW_8 0x00000004
+#define PROCTL_D3CD 0x00000008
#define CMDARG 0x0002e008
#define XFERTYP_DMAEN 0x00000001
#define CINS_TIMEOUT 1000
-#define PIO_TIMEOUT 100000
+#define PIO_TIMEOUT 500
#define DSADDR 0x2e004
#define ESDHC_HOSTCAPBLT_DMAS 0x00400000
#define ESDHC_HOSTCAPBLT_HSS 0x00200000
-#define ESDHC_VENDORSPEC_VSELECT 0x00000002 /* Use 1.8V */
-
struct fsl_esdhc_cfg {
-#ifdef CONFIG_LS2085A
- u64 esdhc_base;
-#else
- u32 esdhc_base;
-#endif
+ phys_addr_t esdhc_base;
u32 sdhc_clk;
u8 max_bus_width;
+ int wp_enable;
+ int vs18_enable; /* Use 1.8V if set to 1 */
struct mmc_config cfg;
};
int fsl_esdhc_mmc_init(bd_t *bis);
int fsl_esdhc_initialize(bd_t *bis, struct fsl_esdhc_cfg *cfg);
void fdt_fixup_esdhc(void *blob, bd_t *bd);
+#ifdef MMC_SUPPORTS_TUNING
+static inline int fsl_esdhc_execute_tuning(struct udevice *dev,
+ uint32_t opcode) {return 0; }
+#endif
#else
static inline int fsl_esdhc_mmc_init(bd_t *bis) { return -ENOSYS; }
static inline void fdt_fixup_esdhc(void *blob, bd_t *bd) {}