COMPAT_NVIDIA_TEGRA20_EMC, /* Tegra20 memory controller */
COMPAT_NVIDIA_TEGRA20_EMC_TABLE, /* Tegra20 memory timing table */
COMPAT_NVIDIA_TEGRA20_NAND, /* Tegra2 NAND controller */
- COMPAT_NVIDIA_TEGRA124_PMC, /* Tegra 124 power mgmt controller */
- COMPAT_NVIDIA_TEGRA186_SDMMC, /* Tegra186 SDMMC controller */
- COMPAT_NVIDIA_TEGRA210_SDMMC, /* Tegra210 SDMMC controller */
- COMPAT_NVIDIA_TEGRA124_SDMMC, /* Tegra124 SDMMC controller */
- COMPAT_NVIDIA_TEGRA30_SDMMC, /* Tegra30 SDMMC controller */
- COMPAT_NVIDIA_TEGRA20_SDMMC, /* Tegra20 SDMMC controller */
COMPAT_NVIDIA_TEGRA124_XUSB_PADCTL,
/* Tegra124 XUSB pad controller */
COMPAT_NVIDIA_TEGRA210_XUSB_PADCTL,
int fdtdec_decode_region(const void *blob, int node, const char *prop_name,
fdt_addr_t *basep, fdt_size_t *sizep);
-enum fmap_compress_t {
- FMAP_COMPRESS_NONE,
- FMAP_COMPRESS_LZO,
-};
-
-enum fmap_hash_t {
- FMAP_HASH_NONE,
- FMAP_HASH_SHA1,
- FMAP_HASH_SHA256,
-};
-
-/* A flash map entry, containing an offset and length */
-struct fmap_entry {
- uint32_t offset;
- uint32_t length;
- uint32_t used; /* Number of bytes used in region */
- enum fmap_compress_t compress_algo; /* Compression type */
- enum fmap_hash_t hash_algo; /* Hash algorithm */
- const uint8_t *hash; /* Hash value */
- int hash_size; /* Hash size */
-};
-
-/**
- * Read a flash entry from the fdt
- *
- * @param blob FDT blob
- * @param node Offset of node to read
- * @param name Name of node being read
- * @param entry Place to put offset and size of this node
- * @return 0 if ok, -ve on error
- */
-int fdtdec_read_fmap_entry(const void *blob, int node, const char *name,
- struct fmap_entry *entry);
-
/**
* Obtain an indexed resource from a device property.
*